; Copyright 2006 Yamane Akira
init:
     ldi r16,(1<<USIWM0)|(1<<USICS1)
     out USICR,r16
...
SlaveSPITransfer:
     out USIDR,r16
     ldi r16,(1<<USIOIF)
     out USISR,r16
SlaveSPITransfer_loop:
     sbis USISR,USIOIF
     rjmp SlaveSPITransfer_loop
     in r16,USIDR
     ret