#ifndef INCLUDED_CYFITTERKEIL_INC
#define INCLUDED_CYFITTERKEIL_INC
$INCLUDE (cydevicekeil.inc)
$INCLUDE (cydevicekeil_trm.inc)

; ADC_DelSig_1_Ext_CP_Clk
ADC_DelSig_1_Ext_CP_Clk__CFG0 EQU CYREG_CLKDIST_DCFG0_CFG0
ADC_DelSig_1_Ext_CP_Clk__CFG1 EQU CYREG_CLKDIST_DCFG0_CFG1
ADC_DelSig_1_Ext_CP_Clk__CFG2 EQU CYREG_CLKDIST_DCFG0_CFG2
ADC_DelSig_1_Ext_CP_Clk__CFG2_SRC_SEL_MASK EQU 0x07
ADC_DelSig_1_Ext_CP_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2
ADC_DelSig_1_Ext_CP_Clk__PM_ACT_MSK EQU 0x01
ADC_DelSig_1_Ext_CP_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
ADC_DelSig_1_Ext_CP_Clk__PM_STBY_MSK EQU 0x01

; ADC_DelSig_1_theACLK
ADC_DelSig_1_theACLK__CFG0 EQU CYREG_CLKDIST_ACFG0_CFG0
ADC_DelSig_1_theACLK__CFG1 EQU CYREG_CLKDIST_ACFG0_CFG1
ADC_DelSig_1_theACLK__CFG2 EQU CYREG_CLKDIST_ACFG0_CFG2
ADC_DelSig_1_theACLK__CFG2_SRC_SEL_MASK EQU 0x07
ADC_DelSig_1_theACLK__CFG3 EQU CYREG_CLKDIST_ACFG0_CFG3
ADC_DelSig_1_theACLK__CFG3_PHASE_DLY_MASK EQU 0x0F
ADC_DelSig_1_theACLK__PM_ACT_CFG EQU CYREG_PM_ACT_CFG1
ADC_DelSig_1_theACLK__PM_ACT_MSK EQU 0x01
ADC_DelSig_1_theACLK__PM_STBY_CFG EQU CYREG_PM_STBY_CFG1
ADC_DelSig_1_theACLK__PM_STBY_MSK EQU 0x01

; USBUART_1_bus_reset
USBUART_1_bus_reset__ES2_PATCH EQU 0
USBUART_1_bus_reset__INTC_CLR_EN_REG EQU CYREG_INTC_CLR_EN2
USBUART_1_bus_reset__INTC_CLR_PD_REG EQU CYREG_INTC_CLR_PD2
USBUART_1_bus_reset__INTC_MASK EQU 0x80
USBUART_1_bus_reset__INTC_NUMBER EQU 23
USBUART_1_bus_reset__INTC_PRIOR_NUM EQU 7
USBUART_1_bus_reset__INTC_PRIOR_REG EQU CYREG_INTC_PRIOR23
USBUART_1_bus_reset__INTC_SET_EN_REG EQU CYREG_INTC_SET_EN2
USBUART_1_bus_reset__INTC_SET_PD_REG EQU CYREG_INTC_SET_PD2
USBUART_1_bus_reset__INTC_VECT EQU (CYREG_INTC_VECT_MBASE+0x2E)

; ADC_DelSig_1_DSM4
ADC_DelSig_1_DSM4__BUF0 EQU CYREG_DSM0_BUF0
ADC_DelSig_1_DSM4__BUF1 EQU CYREG_DSM0_BUF1
ADC_DelSig_1_DSM4__BUF2 EQU CYREG_DSM0_BUF2
ADC_DelSig_1_DSM4__BUF3 EQU CYREG_DSM0_BUF3
ADC_DelSig_1_DSM4__CLK EQU CYREG_DSM0_CLK
ADC_DelSig_1_DSM4__CR0 EQU CYREG_DSM0_CR0
ADC_DelSig_1_DSM4__CR1 EQU CYREG_DSM0_CR1
ADC_DelSig_1_DSM4__CR10 EQU CYREG_DSM0_CR10
ADC_DelSig_1_DSM4__CR11 EQU CYREG_DSM0_CR11
ADC_DelSig_1_DSM4__CR12 EQU CYREG_DSM0_CR12
ADC_DelSig_1_DSM4__CR13 EQU CYREG_DSM0_CR13
ADC_DelSig_1_DSM4__CR14 EQU CYREG_DSM0_CR14
ADC_DelSig_1_DSM4__CR15 EQU CYREG_DSM0_CR15
ADC_DelSig_1_DSM4__CR16 EQU CYREG_DSM0_CR16
ADC_DelSig_1_DSM4__CR17 EQU CYREG_DSM0_CR17
ADC_DelSig_1_DSM4__CR2 EQU CYREG_DSM0_CR2
ADC_DelSig_1_DSM4__CR3 EQU CYREG_DSM0_CR3
ADC_DelSig_1_DSM4__CR4 EQU CYREG_DSM0_CR4
ADC_DelSig_1_DSM4__CR5 EQU CYREG_DSM0_CR5
ADC_DelSig_1_DSM4__CR6 EQU CYREG_DSM0_CR6
ADC_DelSig_1_DSM4__CR7 EQU CYREG_DSM0_CR7
ADC_DelSig_1_DSM4__CR8 EQU CYREG_DSM0_CR8
ADC_DelSig_1_DSM4__CR9 EQU CYREG_DSM0_CR9
ADC_DelSig_1_DSM4__DEM0 EQU CYREG_DSM0_DEM0
ADC_DelSig_1_DSM4__DEM1 EQU CYREG_DSM0_DEM1
ADC_DelSig_1_DSM4__MISC EQU CYREG_DSM0_MISC
ADC_DelSig_1_DSM4__OUT0 EQU CYREG_DSM0_OUT0
ADC_DelSig_1_DSM4__OUT1 EQU CYREG_DSM0_OUT1
ADC_DelSig_1_DSM4__REF0 EQU CYREG_DSM0_REF0
ADC_DelSig_1_DSM4__REF1 EQU CYREG_DSM0_REF1
ADC_DelSig_1_DSM4__REF2 EQU CYREG_DSM0_REF2
ADC_DelSig_1_DSM4__REF3 EQU CYREG_DSM0_REF3
ADC_DelSig_1_DSM4__RSVD1 EQU CYREG_DSM0_RSVD1
ADC_DelSig_1_DSM4__SW0 EQU CYREG_DSM0_SW0
ADC_DelSig_1_DSM4__SW2 EQU CYREG_DSM0_SW2
ADC_DelSig_1_DSM4__SW3 EQU CYREG_DSM0_SW3
ADC_DelSig_1_DSM4__SW4 EQU CYREG_DSM0_SW4
ADC_DelSig_1_DSM4__SW6 EQU CYREG_DSM0_SW6
ADC_DelSig_1_DSM4__TR0 EQU CYREG_NPUMP_DSM_TR0
ADC_DelSig_1_DSM4__TST0 EQU CYREG_DSM0_TST0
ADC_DelSig_1_DSM4__TST1 EQU CYREG_DSM0_TST1

; USBUART_1_arb_int
USBUART_1_arb_int__ES2_PATCH EQU 0
USBUART_1_arb_int__INTC_CLR_EN_REG EQU CYREG_INTC_CLR_EN2
USBUART_1_arb_int__INTC_CLR_PD_REG EQU CYREG_INTC_CLR_PD2
USBUART_1_arb_int__INTC_MASK EQU 0x40
USBUART_1_arb_int__INTC_NUMBER EQU 22
USBUART_1_arb_int__INTC_PRIOR_NUM EQU 7
USBUART_1_arb_int__INTC_PRIOR_REG EQU CYREG_INTC_PRIOR22
USBUART_1_arb_int__INTC_SET_EN_REG EQU CYREG_INTC_SET_EN2
USBUART_1_arb_int__INTC_SET_PD_REG EQU CYREG_INTC_SET_PD2
USBUART_1_arb_int__INTC_VECT EQU (CYREG_INTC_VECT_MBASE+0x2C)

; USBUART_1_sof_int
USBUART_1_sof_int__ES2_PATCH EQU 0
USBUART_1_sof_int__INTC_CLR_EN_REG EQU CYREG_INTC_CLR_EN2
USBUART_1_sof_int__INTC_CLR_PD_REG EQU CYREG_INTC_CLR_PD2
USBUART_1_sof_int__INTC_MASK EQU 0x20
USBUART_1_sof_int__INTC_NUMBER EQU 21
USBUART_1_sof_int__INTC_PRIOR_NUM EQU 7
USBUART_1_sof_int__INTC_PRIOR_REG EQU CYREG_INTC_PRIOR21
USBUART_1_sof_int__INTC_SET_EN_REG EQU CYREG_INTC_SET_EN2
USBUART_1_sof_int__INTC_SET_PD_REG EQU CYREG_INTC_SET_PD2
USBUART_1_sof_int__INTC_VECT EQU (CYREG_INTC_VECT_MBASE+0x2A)

; ADC_DelSig_1_DEC
ADC_DelSig_1_DEC__COHER EQU CYREG_DEC_COHER
ADC_DelSig_1_DEC__CR EQU CYREG_DEC_CR
ADC_DelSig_1_DEC__DR1 EQU CYREG_DEC_DR1
ADC_DelSig_1_DEC__DR2 EQU CYREG_DEC_DR2
ADC_DelSig_1_DEC__DR2H EQU CYREG_DEC_DR2H
ADC_DelSig_1_DEC__GCOR EQU CYREG_DEC_GCOR
ADC_DelSig_1_DEC__GCORH EQU CYREG_DEC_GCORH
ADC_DelSig_1_DEC__GVAL EQU CYREG_DEC_GVAL
ADC_DelSig_1_DEC__OCOR EQU CYREG_DEC_OCOR
ADC_DelSig_1_DEC__OCORH EQU CYREG_DEC_OCORH
ADC_DelSig_1_DEC__OCORM EQU CYREG_DEC_OCORM
ADC_DelSig_1_DEC__OUTSAMP EQU CYREG_DEC_OUTSAMP
ADC_DelSig_1_DEC__OUTSAMPH EQU CYREG_DEC_OUTSAMPH
ADC_DelSig_1_DEC__OUTSAMPM EQU CYREG_DEC_OUTSAMPM
ADC_DelSig_1_DEC__OUTSAMPS EQU CYREG_DEC_OUTSAMPS
ADC_DelSig_1_DEC__PM_ACT_CFG EQU CYREG_PM_ACT_CFG10
ADC_DelSig_1_DEC__PM_ACT_MSK EQU 0x01
ADC_DelSig_1_DEC__PM_STBY_CFG EQU CYREG_PM_STBY_CFG10
ADC_DelSig_1_DEC__PM_STBY_MSK EQU 0x01
ADC_DelSig_1_DEC__SHIFT1 EQU CYREG_DEC_SHIFT1
ADC_DelSig_1_DEC__SHIFT2 EQU CYREG_DEC_SHIFT2
ADC_DelSig_1_DEC__SR EQU CYREG_DEC_SR
ADC_DelSig_1_DEC__TRIM__M1 EQU CYREG_FLSHID_CUST_TABLES_DEC_M1
ADC_DelSig_1_DEC__TRIM__M2 EQU CYREG_FLSHID_CUST_TABLES_DEC_M2
ADC_DelSig_1_DEC__TRIM__M3 EQU CYREG_FLSHID_CUST_TABLES_DEC_M3
ADC_DelSig_1_DEC__TRIM__M4 EQU CYREG_FLSHID_CUST_TABLES_DEC_M4
ADC_DelSig_1_DEC__TRIM__M5 EQU CYREG_FLSHID_CUST_TABLES_DEC_M5
ADC_DelSig_1_DEC__TRIM__M6 EQU CYREG_FLSHID_CUST_TABLES_DEC_M6
ADC_DelSig_1_DEC__TRIM__M7 EQU CYREG_FLSHID_CUST_TABLES_DEC_M7
ADC_DelSig_1_DEC__TRIM__M8 EQU CYREG_FLSHID_CUST_TABLES_DEC_M8

; ADC_DelSig_1_IRQ
ADC_DelSig_1_IRQ__ES2_PATCH EQU 0
ADC_DelSig_1_IRQ__INTC_CLR_EN_REG EQU CYREG_INTC_CLR_EN3
ADC_DelSig_1_IRQ__INTC_CLR_PD_REG EQU CYREG_INTC_CLR_PD3
ADC_DelSig_1_IRQ__INTC_MASK EQU 0x20
ADC_DelSig_1_IRQ__INTC_NUMBER EQU 29
ADC_DelSig_1_IRQ__INTC_PRIOR_NUM EQU 7
ADC_DelSig_1_IRQ__INTC_PRIOR_REG EQU CYREG_INTC_PRIOR29
ADC_DelSig_1_IRQ__INTC_SET_EN_REG EQU CYREG_INTC_SET_EN3
ADC_DelSig_1_IRQ__INTC_SET_PD_REG EQU CYREG_INTC_SET_PD3
ADC_DelSig_1_IRQ__INTC_VECT EQU (CYREG_INTC_VECT_MBASE+0x3A)

; USBUART_1_dp_int
USBUART_1_dp_int__ES2_PATCH EQU 0
USBUART_1_dp_int__INTC_CLR_EN_REG EQU CYREG_INTC_CLR_EN1
USBUART_1_dp_int__INTC_CLR_PD_REG EQU CYREG_INTC_CLR_PD1
USBUART_1_dp_int__INTC_MASK EQU 0x10
USBUART_1_dp_int__INTC_NUMBER EQU 12
USBUART_1_dp_int__INTC_PRIOR_NUM EQU 7
USBUART_1_dp_int__INTC_PRIOR_REG EQU CYREG_INTC_PRIOR12
USBUART_1_dp_int__INTC_SET_EN_REG EQU CYREG_INTC_SET_EN1
USBUART_1_dp_int__INTC_SET_PD_REG EQU CYREG_INTC_SET_PD1
USBUART_1_dp_int__INTC_VECT EQU (CYREG_INTC_VECT_MBASE+0x18)

; USBUART_1_ep_0
USBUART_1_ep_0__ES2_PATCH EQU 0
USBUART_1_ep_0__INTC_CLR_EN_REG EQU CYREG_INTC_CLR_EN3
USBUART_1_ep_0__INTC_CLR_PD_REG EQU CYREG_INTC_CLR_PD3
USBUART_1_ep_0__INTC_MASK EQU 0x01
USBUART_1_ep_0__INTC_NUMBER EQU 24
USBUART_1_ep_0__INTC_PRIOR_NUM EQU 7
USBUART_1_ep_0__INTC_PRIOR_REG EQU CYREG_INTC_PRIOR24
USBUART_1_ep_0__INTC_SET_EN_REG EQU CYREG_INTC_SET_EN3
USBUART_1_ep_0__INTC_SET_PD_REG EQU CYREG_INTC_SET_PD3
USBUART_1_ep_0__INTC_VECT EQU (CYREG_INTC_VECT_MBASE+0x30)

; USBUART_1_ep_1
USBUART_1_ep_1__ES2_PATCH EQU 0
USBUART_1_ep_1__INTC_CLR_EN_REG EQU CYREG_INTC_CLR_EN0
USBUART_1_ep_1__INTC_CLR_PD_REG EQU CYREG_INTC_CLR_PD0
USBUART_1_ep_1__INTC_MASK EQU 0x04
USBUART_1_ep_1__INTC_NUMBER EQU 2
USBUART_1_ep_1__INTC_PRIOR_NUM EQU 7
USBUART_1_ep_1__INTC_PRIOR_REG EQU CYREG_INTC_PRIOR2
USBUART_1_ep_1__INTC_SET_EN_REG EQU CYREG_INTC_SET_EN0
USBUART_1_ep_1__INTC_SET_PD_REG EQU CYREG_INTC_SET_PD0
USBUART_1_ep_1__INTC_VECT EQU (CYREG_INTC_VECT_MBASE+0x04)

; USBUART_1_ep_2
USBUART_1_ep_2__ES2_PATCH EQU 0
USBUART_1_ep_2__INTC_CLR_EN_REG EQU CYREG_INTC_CLR_EN0
USBUART_1_ep_2__INTC_CLR_PD_REG EQU CYREG_INTC_CLR_PD0
USBUART_1_ep_2__INTC_MASK EQU 0x02
USBUART_1_ep_2__INTC_NUMBER EQU 1
USBUART_1_ep_2__INTC_PRIOR_NUM EQU 7
USBUART_1_ep_2__INTC_PRIOR_REG EQU CYREG_INTC_PRIOR1
USBUART_1_ep_2__INTC_SET_EN_REG EQU CYREG_INTC_SET_EN0
USBUART_1_ep_2__INTC_SET_PD_REG EQU CYREG_INTC_SET_PD0
USBUART_1_ep_2__INTC_VECT EQU (CYREG_INTC_VECT_MBASE+0x02)

; USBUART_1_ep_3
USBUART_1_ep_3__ES2_PATCH EQU 0
USBUART_1_ep_3__INTC_CLR_EN_REG EQU CYREG_INTC_CLR_EN0
USBUART_1_ep_3__INTC_CLR_PD_REG EQU CYREG_INTC_CLR_PD0
USBUART_1_ep_3__INTC_MASK EQU 0x01
USBUART_1_ep_3__INTC_NUMBER EQU 0
USBUART_1_ep_3__INTC_PRIOR_NUM EQU 7
USBUART_1_ep_3__INTC_PRIOR_REG EQU CYREG_INTC_PRIOR0
USBUART_1_ep_3__INTC_SET_EN_REG EQU CYREG_INTC_SET_EN0
USBUART_1_ep_3__INTC_SET_PD_REG EQU CYREG_INTC_SET_PD0
USBUART_1_ep_3__INTC_VECT EQU (CYREG_INTC_VECT_MBASE+0x00)

; USBUART_1_USB
USBUART_1_USB__ARB_CFG EQU CYREG_USB_ARB_CFG
USBUART_1_USB__ARB_EP1_CFG EQU CYREG_USB_ARB_EP1_CFG
USBUART_1_USB__ARB_EP1_INT_EN EQU CYREG_USB_ARB_EP1_INT_EN
USBUART_1_USB__ARB_EP1_SR EQU CYREG_USB_ARB_EP1_SR
USBUART_1_USB__ARB_EP2_CFG EQU CYREG_USB_ARB_EP2_CFG
USBUART_1_USB__ARB_EP2_INT_EN EQU CYREG_USB_ARB_EP2_INT_EN
USBUART_1_USB__ARB_EP2_SR EQU CYREG_USB_ARB_EP2_SR
USBUART_1_USB__ARB_EP3_CFG EQU CYREG_USB_ARB_EP3_CFG
USBUART_1_USB__ARB_EP3_INT_EN EQU CYREG_USB_ARB_EP3_INT_EN
USBUART_1_USB__ARB_EP3_SR EQU CYREG_USB_ARB_EP3_SR
USBUART_1_USB__ARB_EP4_CFG EQU CYREG_USB_ARB_EP4_CFG
USBUART_1_USB__ARB_EP4_INT_EN EQU CYREG_USB_ARB_EP4_INT_EN
USBUART_1_USB__ARB_EP4_SR EQU CYREG_USB_ARB_EP4_SR
USBUART_1_USB__ARB_EP5_CFG EQU CYREG_USB_ARB_EP5_CFG
USBUART_1_USB__ARB_EP5_INT_EN EQU CYREG_USB_ARB_EP5_INT_EN
USBUART_1_USB__ARB_EP5_SR EQU CYREG_USB_ARB_EP5_SR
USBUART_1_USB__ARB_EP6_CFG EQU CYREG_USB_ARB_EP6_CFG
USBUART_1_USB__ARB_EP6_INT_EN EQU CYREG_USB_ARB_EP6_INT_EN
USBUART_1_USB__ARB_EP6_SR EQU CYREG_USB_ARB_EP6_SR
USBUART_1_USB__ARB_EP7_CFG EQU CYREG_USB_ARB_EP7_CFG
USBUART_1_USB__ARB_EP7_INT_EN EQU CYREG_USB_ARB_EP7_INT_EN
USBUART_1_USB__ARB_EP7_SR EQU CYREG_USB_ARB_EP7_SR
USBUART_1_USB__ARB_EP8_CFG EQU CYREG_USB_ARB_EP8_CFG
USBUART_1_USB__ARB_EP8_INT_EN EQU CYREG_USB_ARB_EP8_INT_EN
USBUART_1_USB__ARB_EP8_SR EQU CYREG_USB_ARB_EP8_SR
USBUART_1_USB__ARB_INT_EN EQU CYREG_USB_ARB_INT_EN
USBUART_1_USB__ARB_INT_SR EQU CYREG_USB_ARB_INT_SR
USBUART_1_USB__ARB_RW1_DR EQU CYREG_USB_ARB_RW1_DR
USBUART_1_USB__ARB_RW1_RA EQU CYREG_USB_ARB_RW1_RA
USBUART_1_USB__ARB_RW1_RA_MSB EQU CYREG_USB_ARB_RW1_RA_MSB
USBUART_1_USB__ARB_RW1_WA EQU CYREG_USB_ARB_RW1_WA
USBUART_1_USB__ARB_RW1_WA_MSB EQU CYREG_USB_ARB_RW1_WA_MSB
USBUART_1_USB__ARB_RW2_DR EQU CYREG_USB_ARB_RW2_DR
USBUART_1_USB__ARB_RW2_RA EQU CYREG_USB_ARB_RW2_RA
USBUART_1_USB__ARB_RW2_RA_MSB EQU CYREG_USB_ARB_RW2_RA_MSB
USBUART_1_USB__ARB_RW2_WA EQU CYREG_USB_ARB_RW2_WA
USBUART_1_USB__ARB_RW2_WA_MSB EQU CYREG_USB_ARB_RW2_WA_MSB
USBUART_1_USB__ARB_RW3_DR EQU CYREG_USB_ARB_RW3_DR
USBUART_1_USB__ARB_RW3_RA EQU CYREG_USB_ARB_RW3_RA
USBUART_1_USB__ARB_RW3_RA_MSB EQU CYREG_USB_ARB_RW3_RA_MSB
USBUART_1_USB__ARB_RW3_WA EQU CYREG_USB_ARB_RW3_WA
USBUART_1_USB__ARB_RW3_WA_MSB EQU CYREG_USB_ARB_RW3_WA_MSB
USBUART_1_USB__ARB_RW4_DR EQU CYREG_USB_ARB_RW4_DR
USBUART_1_USB__ARB_RW4_RA EQU CYREG_USB_ARB_RW4_RA
USBUART_1_USB__ARB_RW4_RA_MSB EQU CYREG_USB_ARB_RW4_RA_MSB
USBUART_1_USB__ARB_RW4_WA EQU CYREG_USB_ARB_RW4_WA
USBUART_1_USB__ARB_RW4_WA_MSB EQU CYREG_USB_ARB_RW4_WA_MSB
USBUART_1_USB__ARB_RW5_DR EQU CYREG_USB_ARB_RW5_DR
USBUART_1_USB__ARB_RW5_RA EQU CYREG_USB_ARB_RW5_RA
USBUART_1_USB__ARB_RW5_RA_MSB EQU CYREG_USB_ARB_RW5_RA_MSB
USBUART_1_USB__ARB_RW5_WA EQU CYREG_USB_ARB_RW5_WA
USBUART_1_USB__ARB_RW5_WA_MSB EQU CYREG_USB_ARB_RW5_WA_MSB
USBUART_1_USB__ARB_RW6_DR EQU CYREG_USB_ARB_RW6_DR
USBUART_1_USB__ARB_RW6_RA EQU CYREG_USB_ARB_RW6_RA
USBUART_1_USB__ARB_RW6_RA_MSB EQU CYREG_USB_ARB_RW6_RA_MSB
USBUART_1_USB__ARB_RW6_WA EQU CYREG_USB_ARB_RW6_WA
USBUART_1_USB__ARB_RW6_WA_MSB EQU CYREG_USB_ARB_RW6_WA_MSB
USBUART_1_USB__ARB_RW7_DR EQU CYREG_USB_ARB_RW7_DR
USBUART_1_USB__ARB_RW7_RA EQU CYREG_USB_ARB_RW7_RA
USBUART_1_USB__ARB_RW7_RA_MSB EQU CYREG_USB_ARB_RW7_RA_MSB
USBUART_1_USB__ARB_RW7_WA EQU CYREG_USB_ARB_RW7_WA
USBUART_1_USB__ARB_RW7_WA_MSB EQU CYREG_USB_ARB_RW7_WA_MSB
USBUART_1_USB__ARB_RW8_DR EQU CYREG_USB_ARB_RW8_DR
USBUART_1_USB__ARB_RW8_RA EQU CYREG_USB_ARB_RW8_RA
USBUART_1_USB__ARB_RW8_RA_MSB EQU CYREG_USB_ARB_RW8_RA_MSB
USBUART_1_USB__ARB_RW8_WA EQU CYREG_USB_ARB_RW8_WA
USBUART_1_USB__ARB_RW8_WA_MSB EQU CYREG_USB_ARB_RW8_WA_MSB
USBUART_1_USB__BUF_SIZE EQU CYREG_USB_BUF_SIZE
USBUART_1_USB__BUS_RST_CNT EQU CYREG_USB_BUS_RST_CNT
USBUART_1_USB__CR0 EQU CYREG_USB_CR0
USBUART_1_USB__CR1 EQU CYREG_USB_CR1
USBUART_1_USB__CWA EQU CYREG_USB_CWA
USBUART_1_USB__CWA_MSB EQU CYREG_USB_CWA_MSB
USBUART_1_USB__DMA_THRES EQU CYREG_USB_DMA_THRES
USBUART_1_USB__DMA_THRES_MSB EQU CYREG_USB_DMA_THRES_MSB
USBUART_1_USB__DYN_RECONFIG EQU CYREG_USB_DYN_RECONFIG
USBUART_1_USB__EP0_CNT EQU CYREG_USB_EP0_CNT
USBUART_1_USB__EP0_CR EQU CYREG_USB_EP0_CR
USBUART_1_USB__EP0_DR0 EQU CYREG_USB_EP0_DR0
USBUART_1_USB__EP0_DR1 EQU CYREG_USB_EP0_DR1
USBUART_1_USB__EP0_DR2 EQU CYREG_USB_EP0_DR2
USBUART_1_USB__EP0_DR3 EQU CYREG_USB_EP0_DR3
USBUART_1_USB__EP0_DR4 EQU CYREG_USB_EP0_DR4
USBUART_1_USB__EP0_DR5 EQU CYREG_USB_EP0_DR5
USBUART_1_USB__EP0_DR6 EQU CYREG_USB_EP0_DR6
USBUART_1_USB__EP0_DR7 EQU CYREG_USB_EP0_DR7
USBUART_1_USB__EP_ACTIVE EQU CYREG_USB_EP_ACTIVE
USBUART_1_USB__EP_TYPE EQU CYREG_USB_EP_TYPE
USBUART_1_USB__MEM_DATA EQU CYREG_USB_MEM_DATA_MBASE
USBUART_1_USB__OSCLK_DR0 EQU CYREG_USB_OSCLK_DR0
USBUART_1_USB__OSCLK_DR1 EQU CYREG_USB_OSCLK_DR1
USBUART_1_USB__PM_ACT_CFG EQU CYREG_PM_ACT_CFG5
USBUART_1_USB__PM_ACT_MSK EQU 0x01
USBUART_1_USB__PM_STBY_CFG EQU CYREG_PM_STBY_CFG5
USBUART_1_USB__PM_STBY_MSK EQU 0x01
USBUART_1_USB__SIE_EP1_CNT0 EQU CYREG_USB_SIE_EP1_CNT0
USBUART_1_USB__SIE_EP1_CNT1 EQU CYREG_USB_SIE_EP1_CNT1
USBUART_1_USB__SIE_EP1_CR0 EQU CYREG_USB_SIE_EP1_CR0
USBUART_1_USB__SIE_EP2_CNT0 EQU CYREG_USB_SIE_EP2_CNT0
USBUART_1_USB__SIE_EP2_CNT1 EQU CYREG_USB_SIE_EP2_CNT1
USBUART_1_USB__SIE_EP2_CR0 EQU CYREG_USB_SIE_EP2_CR0
USBUART_1_USB__SIE_EP3_CNT0 EQU CYREG_USB_SIE_EP3_CNT0
USBUART_1_USB__SIE_EP3_CNT1 EQU CYREG_USB_SIE_EP3_CNT1
USBUART_1_USB__SIE_EP3_CR0 EQU CYREG_USB_SIE_EP3_CR0
USBUART_1_USB__SIE_EP4_CNT0 EQU CYREG_USB_SIE_EP4_CNT0
USBUART_1_USB__SIE_EP4_CNT1 EQU CYREG_USB_SIE_EP4_CNT1
USBUART_1_USB__SIE_EP4_CR0 EQU CYREG_USB_SIE_EP4_CR0
USBUART_1_USB__SIE_EP5_CNT0 EQU CYREG_USB_SIE_EP5_CNT0
USBUART_1_USB__SIE_EP5_CNT1 EQU CYREG_USB_SIE_EP5_CNT1
USBUART_1_USB__SIE_EP5_CR0 EQU CYREG_USB_SIE_EP5_CR0
USBUART_1_USB__SIE_EP6_CNT0 EQU CYREG_USB_SIE_EP6_CNT0
USBUART_1_USB__SIE_EP6_CNT1 EQU CYREG_USB_SIE_EP6_CNT1
USBUART_1_USB__SIE_EP6_CR0 EQU CYREG_USB_SIE_EP6_CR0
USBUART_1_USB__SIE_EP7_CNT0 EQU CYREG_USB_SIE_EP7_CNT0
USBUART_1_USB__SIE_EP7_CNT1 EQU CYREG_USB_SIE_EP7_CNT1
USBUART_1_USB__SIE_EP7_CR0 EQU CYREG_USB_SIE_EP7_CR0
USBUART_1_USB__SIE_EP8_CNT0 EQU CYREG_USB_SIE_EP8_CNT0
USBUART_1_USB__SIE_EP8_CNT1 EQU CYREG_USB_SIE_EP8_CNT1
USBUART_1_USB__SIE_EP8_CR0 EQU CYREG_USB_SIE_EP8_CR0
USBUART_1_USB__SIE_EP_INT_EN EQU CYREG_USB_SIE_EP_INT_EN
USBUART_1_USB__SIE_EP_INT_SR EQU CYREG_USB_SIE_EP_INT_SR
USBUART_1_USB__SOF0 EQU CYREG_USB_SOF0
USBUART_1_USB__SOF1 EQU CYREG_USB_SOF1
USBUART_1_USB__USBIO_CR0 EQU CYREG_USB_USBIO_CR0
USBUART_1_USB__USBIO_CR1 EQU CYREG_USB_USBIO_CR1
USBUART_1_USB__USBIO_CR2 EQU CYREG_USB_USBIO_CR2
USBUART_1_USB__USB_CLK_EN EQU CYREG_USB_USB_CLK_EN

; USBUART_1_Dm
USBUART_1_Dm__0__MASK EQU 0x80
USBUART_1_Dm__0__PC EQU CYREG_IO_PC_PRT15_7_6_PC1
USBUART_1_Dm__0__PORT EQU 15
USBUART_1_Dm__0__SHIFT EQU 7
USBUART_1_Dm__AG EQU CYREG_PRT15_AG
USBUART_1_Dm__AMUX EQU CYREG_PRT15_AMUX
USBUART_1_Dm__BIE EQU CYREG_PRT15_BIE
USBUART_1_Dm__BIT_MASK EQU CYREG_PRT15_BIT_MASK
USBUART_1_Dm__BYP EQU CYREG_PRT15_BYP
USBUART_1_Dm__CTL EQU CYREG_PRT15_CTL
USBUART_1_Dm__DM0 EQU CYREG_PRT15_DM0
USBUART_1_Dm__DM1 EQU CYREG_PRT15_DM1
USBUART_1_Dm__DM2 EQU CYREG_PRT15_DM2
USBUART_1_Dm__DR EQU CYREG_PRT15_DR
USBUART_1_Dm__INP_DIS EQU CYREG_PRT15_INP_DIS
USBUART_1_Dm__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
USBUART_1_Dm__LCD_EN EQU CYREG_PRT15_LCD_EN
USBUART_1_Dm__PORT EQU 15
USBUART_1_Dm__PRT EQU CYREG_PRT15_PRT
USBUART_1_Dm__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
USBUART_1_Dm__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
USBUART_1_Dm__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
USBUART_1_Dm__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
USBUART_1_Dm__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
USBUART_1_Dm__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
USBUART_1_Dm__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
USBUART_1_Dm__PS EQU CYREG_PRT15_PS
USBUART_1_Dm__SLW EQU CYREG_PRT15_SLW

; USBUART_1_Dp
USBUART_1_Dp__0__MASK EQU 0x40
USBUART_1_Dp__0__PC EQU CYREG_IO_PC_PRT15_7_6_PC0
USBUART_1_Dp__0__PORT EQU 15
USBUART_1_Dp__0__SHIFT EQU 6
USBUART_1_Dp__AG EQU CYREG_PRT15_AG
USBUART_1_Dp__AMUX EQU CYREG_PRT15_AMUX
USBUART_1_Dp__BIE EQU CYREG_PRT15_BIE
USBUART_1_Dp__BIT_MASK EQU CYREG_PRT15_BIT_MASK
USBUART_1_Dp__BYP EQU CYREG_PRT15_BYP
USBUART_1_Dp__CTL EQU CYREG_PRT15_CTL
USBUART_1_Dp__DM0 EQU CYREG_PRT15_DM0
USBUART_1_Dp__DM1 EQU CYREG_PRT15_DM1
USBUART_1_Dp__DM2 EQU CYREG_PRT15_DM2
USBUART_1_Dp__DR EQU CYREG_PRT15_DR
USBUART_1_Dp__INP_DIS EQU CYREG_PRT15_INP_DIS
USBUART_1_Dp__INTSTAT EQU CYREG_PICU15_INTSTAT
USBUART_1_Dp__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
USBUART_1_Dp__LCD_EN EQU CYREG_PRT15_LCD_EN
USBUART_1_Dp__MASK EQU 0x40
USBUART_1_Dp__PORT EQU 15
USBUART_1_Dp__PRT EQU CYREG_PRT15_PRT
USBUART_1_Dp__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
USBUART_1_Dp__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
USBUART_1_Dp__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
USBUART_1_Dp__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
USBUART_1_Dp__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
USBUART_1_Dp__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
USBUART_1_Dp__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
USBUART_1_Dp__PS EQU CYREG_PRT15_PS
USBUART_1_Dp__SHIFT EQU 6
USBUART_1_Dp__SLW EQU CYREG_PRT15_SLW
USBUART_1_Dp__SNAP EQU CYREG_PICU15_SNAP

; Pin_1
Pin_1__0__MASK EQU 0x01
Pin_1__0__PC EQU CYREG_PRT0_PC0
Pin_1__0__PORT EQU 0
Pin_1__0__SHIFT EQU 0
Pin_1__AG EQU CYREG_PRT0_AG
Pin_1__AMUX EQU CYREG_PRT0_AMUX
Pin_1__BIE EQU CYREG_PRT0_BIE
Pin_1__BIT_MASK EQU CYREG_PRT0_BIT_MASK
Pin_1__BYP EQU CYREG_PRT0_BYP
Pin_1__CTL EQU CYREG_PRT0_CTL
Pin_1__DM0 EQU CYREG_PRT0_DM0
Pin_1__DM1 EQU CYREG_PRT0_DM1
Pin_1__DM2 EQU CYREG_PRT0_DM2
Pin_1__DR EQU CYREG_PRT0_DR
Pin_1__INP_DIS EQU CYREG_PRT0_INP_DIS
Pin_1__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
Pin_1__LCD_EN EQU CYREG_PRT0_LCD_EN
Pin_1__PORT EQU 0
Pin_1__PRT EQU CYREG_PRT0_PRT
Pin_1__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
Pin_1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
Pin_1__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
Pin_1__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
Pin_1__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
Pin_1__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
Pin_1__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
Pin_1__PS EQU CYREG_PRT0_PS
Pin_1__SLW EQU CYREG_PRT0_SLW

; Miscellaneous
; -- WARNING: define names containting LEOPARD or PANTHER are deprecated and will be removed in a future release
CYDEV_BOOTLOADER_IO_COMP_USBUART_1 EQU 1
CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO EQU 0
CYDEV_DEBUGGING_DPS_SWD EQU 2
CYDEV_CONFIG_UNUSED_IO_AllowButWarn EQU 0
CYDEV_CONFIGURATION_MODE_DMA EQU 2
CYDEV_CONFIG_FASTBOOT_ENABLED EQU 1
CYDEV_CHIP_REV_LEOPARD_PRODUCTION EQU 3
CYDEV_CHIP_REVISION_3A_PRODUCTION EQU 3
CYDEV_CHIP_MEMBER_3A EQU 1
CYDEV_CHIP_FAMILY_PSOC3 EQU 1
CYDEV_CHIP_DIE_LEOPARD EQU 1
CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_DIE_LEOPARD
CYDEV_BOOTLOADER_CHECKSUM_BASIC EQU 0
BCLK__BUS_CLK__HZ EQU 48000000
BCLK__BUS_CLK__KHZ EQU 48000
BCLK__BUS_CLK__MHZ EQU 48
CYDEV_APPLICATION_ID EQU 0x0000
CYDEV_APPLICATION_VERSION EQU 0x0000
CYDEV_BOOTLOADER_CHECKSUM EQU CYDEV_BOOTLOADER_CHECKSUM_BASIC
CYDEV_BOOTLOADER_CHECKSUM_CRC EQU 1
CYDEV_BOOTLOADER_FAST_VERIFY EQU 0
CYDEV_BOOTLOADER_VERSION EQU 0x0000
CYDEV_BOOTLOADER_WAIT_COMMAND EQU 1
CYDEV_BOOTLOADER_WAIT_TIME EQU 200
CYDEV_CHIP_DIE_ACTUAL EQU CYDEV_CHIP_DIE_EXPECT
CYDEV_CHIP_DIE_PANTHER EQU 2
CYDEV_CHIP_DIE_UNKNOWN EQU 0
CYDEV_CHIP_FAMILY_PSOC4 EQU 2
CYDEV_CHIP_FAMILY_PSOC5 EQU 3
CYDEV_CHIP_FAMILY_UNKNOWN EQU 0
CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC3
CYDEV_CHIP_JTAG_ID EQU 0x1E01E069
CYDEV_CHIP_MEMBER_5A EQU 2
CYDEV_CHIP_MEMBER_UNKNOWN EQU 0
CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_3A
CYDEV_CHIP_REVISION_3A_ES1 EQU 0
CYDEV_CHIP_REVISION_3A_ES2 EQU 1
CYDEV_CHIP_REVISION_3A_ES3 EQU 3
CYDEV_CHIP_REVISION_5A_ES0 EQU 0
CYDEV_CHIP_REVISION_5A_ES1 EQU 1
CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1
CYDEV_CHIP_REVISION_USED EQU CYDEV_CHIP_REVISION_3A_PRODUCTION
CYDEV_CHIP_REV_EXPECT EQU CYDEV_CHIP_REV_LEOPARD_PRODUCTION
CYDEV_CHIP_REV_LEOPARD_ES1 EQU 0
CYDEV_CHIP_REV_LEOPARD_ES2 EQU 1
CYDEV_CHIP_REV_LEOPARD_ES3 EQU 3
CYDEV_CHIP_REV_PANTHER_ES0 EQU 0
CYDEV_CHIP_REV_PANTHER_ES1 EQU 1
CYDEV_CHIP_REV_PANTHER_PRODUCTION EQU 1
CYDEV_CONFIGURATION_CLEAR_SRAM EQU 1
CYDEV_CONFIGURATION_COMPRESSED EQU 0
CYDEV_CONFIGURATION_DMA EQU 1
CYDEV_CONFIGURATION_ECC EQU 1
CYDEV_CONFIGURATION_IMOENABLED EQU CYDEV_CONFIG_FASTBOOT_ENABLED
CYDEV_CONFIGURATION_MODE EQU CYDEV_CONFIGURATION_MODE_DMA
CYDEV_CONFIGURATION_MODE_COMPRESSED EQU 0
CYDEV_CONFIGURATION_MODE_UNCOMPRESSED EQU 1
CYDEV_CONFIG_FORCE_ROUTE EQU 0
CYDEV_CONFIG_UNUSED_IO EQU CYDEV_CONFIG_UNUSED_IO_AllowButWarn
CYDEV_CONFIG_UNUSED_IO_AllowWithInfo EQU 1
CYDEV_CONFIG_UNUSED_IO_Disallowed EQU 2
CYDEV_CUSTOM_ID EQU 0x00000000
CYDEV_DEBUGGING_DPS EQU CYDEV_DEBUGGING_DPS_SWD
CYDEV_DEBUGGING_DPS_Disable EQU 3
CYDEV_DEBUGGING_DPS_JTAG_4 EQU 1
CYDEV_DEBUGGING_DPS_JTAG_5 EQU 0
CYDEV_DEBUGGING_ENABLE EQU 1
CYDEV_DEBUGGING_REQXRES EQU 1
CYDEV_DEBUGGING_XRES EQU 0
CYDEV_DEBUG_ENABLE_MASK EQU 0x01
CYDEV_DEBUG_ENABLE_REGISTER EQU CYREG_MLOGIC_DEBUG
CYDEV_DMA_CHANNELS_AVAILABLE EQU 24
CYDEV_ECC_ENABLE EQU 0
CYDEV_INSTRUCT_CACHE_ENABLED EQU 1
CYDEV_PROJ_TYPE EQU 0
CYDEV_PROJ_TYPE_BOOTLOADER EQU 1
CYDEV_PROJ_TYPE_LOADABLE EQU 2
CYDEV_PROJ_TYPE_MULTIAPPBOOTLOADER EQU 3
CYDEV_PROJ_TYPE_STANDARD EQU 0
CYDEV_PROTECTION_ENABLE EQU 0
CYDEV_USB_CLK_OSC_LOCKING_ENABLED_AT_PWR_UP EQU 1
CYDEV_VDDA LIT '5.0'
CYDEV_VDDA_MV EQU 5000
CYDEV_VDDD LIT '5.0'
CYDEV_VDDD_MV EQU 5000
CYDEV_VDDIO0 LIT '5.0'
CYDEV_VDDIO0_MV EQU 5000
CYDEV_VDDIO1 LIT '5.0'
CYDEV_VDDIO1_MV EQU 5000
CYDEV_VDDIO2 LIT '5.0'
CYDEV_VDDIO2_MV EQU 5000
CYDEV_VDDIO3 LIT '5.0'
CYDEV_VDDIO3_MV EQU 5000
CYDEV_VIO0 EQU 5
CYDEV_VIO0_MV EQU 5000
CYDEV_VIO1 EQU 5
CYDEV_VIO1_MV EQU 5000
CYDEV_VIO2 EQU 5
CYDEV_VIO2_MV EQU 5000
CYDEV_VIO3 EQU 5
CYDEV_VIO3_MV EQU 5000
CyBtldr_Custom_Interface EQU CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO
CyBtldr_USBUART_1 EQU CYDEV_BOOTLOADER_IO_COMP_USBUART_1
DMA_CHANNELS_USED__MASK0 EQU 0x00000000
CYDEV_BOOTLOADER_ENABLE EQU 0

#endif /* INCLUDED_CYFITTERKEIL_INC */
