LYNX_DISP Project Status
Project File: | lynx_disp.ise | Current State: | Programming File Generated
Module Name: | lynx_disp | Errors: | No Errors
Target Device: | xc3s50an-4tqg144 | Warnings: | 520 Warnings
Product Version: | ISE 9.2.04i | Updated: | ? 2 20 12:08:18 2010

LYNX_DISP Partition Summary
No partition information was found.

Device Utilization Summary
Logic Utilization | Used | Available | Utilization | Note(s)
Number of Slice Flip Flops | 629 | 1,408 | 44% |
Number of 4 input LUTs | 1,032 | 1,408 | 73% |
Logic Distribution |  |  |  |
Number of occupied Slices | 702 | 704 | 99% |
Number of Slices containing only related logic | 575 | 702 | 81% |
Number of Slices containing unrelated logic | 127 | 702 | 18% |
Total Number of 4 input LUTs | 1,097 | 1,408 | 77% |
Number used as logic | 1,032 |  |  |
Number used as a route-thru | 65 |  |  |
Number of bonded IOBs | 54 | 108 | 50% |
IOB Flip Flops | 27 |  |  |
IOB Master Pads | 8 |  |  |
IOB Slave Pads | 8 |  |  |
Number of ODDR2s used | 9 |  |  |
Number of GCLKs | 4 | 24 | 16% |
Number of DCMs | 2 | 2 | 100% |
Total equivalent gate count for design | 27,276 |  |  |
Additional JTAG gate count for IOBs | 2,592 |  |  |

Performance Summary
Final Timing Score: | 8409 | Pinout Data: | Pinout Report
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report
Timing Constraints: | 1 Failing Constraint |  |

Detailed Reports
Report Name | Status | Generated | Errors | Warnings | Infos
Synthesis Report | Current | ? 2 19 18:24:58 2010 | 0 | 414 Warnings | 51 Infos
Translation Report | Current | ? 2 19 18:25:04 2010 | 0 | 9 Warnings | 2 Infos
Map Report | Current | ? 2 19 18:25:17 2010 | 0 | 21 Warnings | 6 Infos
Place and Route Report | Current | ? 2 19 18:25:43 2010 | 0 | 26 Warnings | 2 Infos
Static Timing Report | Current | ? 2 19 18:25:49 2010 | 0 | 50 Warnings | 2 Infos
Bitgen Report | Current | ? 2 19 18:25:57 2010 | 0 | 0 | 0