{
  'XILINX' => 'C:/Xilinx/12.4/ISE_DS/ISE',
  'clkWrapper' => 'qpsk_mod_cw',
  'clkWrapperFile' => 'qpsk_mod_cw.vhd',
  'createTestbench' => 0,
  'design' => 'qpsk_mod',
  'designFileList' => [
    'qpsk_mod.vhd',
    'qpsk_mod_cw.vhd',
  ],
  'device' => 'xc6vlx240t-1ff1156',
  'family' => 'virtex6',
  'files' => [
    'addsb_11_0_069323d67b6b1bb0.ngc',
    'dds_cmplr_v4_0_8681c3021f782964.ngc',
    'fr_cmplr_v6_1_12f6f17dd2c8f0fa.mif',
    'fr_cmplr_v6_1_12f6f17dd2c8f0fa.ngc',
    'mult_11_2_13a19c86adbbec0f.ngc',
    'xlpersistentdff.ngc',
    'synopsis',
    'qpsk_mod.vhd',
    'xlpersistentdff.ngc',
    'qpsk_mod_cw.vhd',
    'qpsk_mod_cw.ucf',
    'qpsk_mod_cw.xcf',
    'qpsk_mod_cw.sdc',
    'xst_qpsk_mod.prj',
    'xst_qpsk_mod.scr',
    'vcom.do',
    'isim_qpsk_mod.prj',
  ],
  'hdlKind' => 'vhdl',
  'isCombinatorial' => 0,
  'synthesisTool' => 'XST',
  'sysgen' => 'C:/Xilinx/12.4/ISE_DS/ISE/sysgen',
  'systemClockPeriod' => 30,
  'testbench' => 0,
  'using71Netlister' => 1,
  'vsimtime' => 'Inf ns',
}
