/************************************************************************/
/* CQBBEL GNU CC Common Control Software / (C) Toshio MURAI 2011, 2012	*/
/*      This is Free Software;   You can redistribute this software     */
/*      and/or modify it under the terms of the GNU General Public      */
/*      License version 3, or (at your option) any later version.       */
/************************************************************************/

struct str_systimer {
	volatile unsigned int	CTRL;
	volatile unsigned int	LOAD;
	volatile unsigned int	VAL;
	volatile unsigned int	REF;
};
#define	SYSTICK	((struct str_systimer *)0xE000E010)

struct str_nvic{	
	volatile unsigned int	IRQ0_31;
	volatile unsigned int	IRQ32_63;
	volatile unsigned int	IRQ64_95;
	volatile unsigned int	IRQ96_127;
	volatile unsigned int	IRQ128_159;
	volatile unsigned int	IRQ160_191;
	volatile unsigned int	IRQ192_223;
	volatile unsigned int	IRQ224_255;
};
#define	IRQENABLE	((struct str_nvic*)0xE000E100)
#define	IRQDISABLE	((struct str_nvic*)0xE000E180)
#define	IRQHOLDSET	((struct str_nvic*)0xE000E200)
#define	IRQHOLDCLR	((struct str_nvic*)0xE000E280)
#define	IRQACTBIT	((struct str_nvic*)0xE000E300)

struct str_wdt {
	volatile unsigned int	LDR;
	volatile unsigned int	VLR;
	volatile unsigned int	CTL;
	volatile unsigned int	ICL;
	volatile unsigned int	RIS;
	volatile unsigned int	NONE[0x2FB];
	volatile unsigned int	LCK;
};
#define	WDT	((struct str_wdt*)0x40011000)

struct str_gpio {
	volatile unsigned int	R0;
	volatile unsigned int	R1;
	volatile unsigned int	R2;
	volatile unsigned int	R3;
	volatile unsigned int	R4;
	volatile unsigned int	R5;
	volatile unsigned int	R6;
	volatile unsigned int	R7;
	volatile unsigned int	R8;
	volatile unsigned int	R9;
	volatile unsigned int	RA;
	volatile unsigned int	RB;
	volatile unsigned int	RC;
	volatile unsigned int	RD;
	volatile unsigned int	RE;
	volatile unsigned int	RF;
};

#define	GPIOPFR	((struct str_gpio*)0x40033000)		//
#define	GPIOPCR	((struct str_gpio*)0x40033100)		//
#define	GPIODDR	((struct str_gpio*)0x40033200)		//
#define	GPIOPDIR	((struct str_gpio*)0x40033300)		//
#define	GPIOPDOR	((struct str_gpio*)0x40033400)		//
#define	GPIOPZR		((struct str_gpio*)0x40033700)		//
#define	GPIOEPFR	((struct str_gpio*)0x40033600)		//

struct str_gpioade {
	volatile unsigned int	ADE;
};
#define	GPIOADE		((struct str_gpioade *)0x40033500)


struct str_exti{
	volatile unsigned int	ENIR;	//ENable Interrupt request Register
	volatile unsigned int	EIRR;	//External Interrupt Request Register]
	volatile unsigned int	EICL;	//External Interrupt CLear register
	volatile unsigned int	ELVR;	//External interrupt LeVel Register
	volatile unsigned int	ELVR1;	//
};
#define	EXTI	((struct str_exti *)0x40030000)

struct str_adcu {
	volatile unsigned char	ADSR;	//00	8-8
	volatile unsigned char	ADCR;	//00	8-8
	volatile unsigned short	NONE0;	//00	8-8
	volatile unsigned int	NONE1;		//
	volatile unsigned char	SFNS;	//04	8-8
	volatile unsigned char	SCCR;	//04	8-8
	volatile unsigned short	NONE2;	//04	8-8
	volatile unsigned int	SCFD;		//08	32
	volatile unsigned int	SCIS32;		//10	8-8
	volatile unsigned int	SCIS10;		//14	8-8
	volatile unsigned char	PFNS;	//18	8-8
	volatile unsigned char	PCCR;	//18	8-8
	volatile unsigned short	NONE3;	//18	8-8
	volatile unsigned int	PCFD;		//1C	32
	volatile unsigned int	PCIS;		//20	8
	volatile unsigned short	CMPCR;		//24	8
	volatile unsigned short	CMPDB;		//24	8
	volatile unsigned int	ADSS32;		//28	8-8
	volatile unsigned int	ADSS10;		//2C	8-8
	volatile unsigned int	ADST01;		//30	8-8
	volatile unsigned int	ADCT;		//34	8
	volatile unsigned char	PRTSL;	//38	8-8
	volatile unsigned char	SCTSL;	//38	8-8
	volatile unsigned short	NONE4;
	volatile unsigned int	ADCEN;		//3C	8
};

#define	ADCU0	((struct str_adcu *)0x40027000)
#define	ADCU1	((struct str_adcu *)0x40027100)
#define	ADCU2	((struct str_adcu *)0x40027200)

struct str_intreqread {
	volatile unsigned int	DRQSEL;
	volatile unsigned int	NONE1;
	volatile unsigned int	ODDPKS;
	volatile unsigned int	NONE2;
	volatile unsigned int	EXC02MON;	//0x40031010
	volatile unsigned int	IRQ00MON;	//
	volatile unsigned int	IRQ01MON;	//
	volatile unsigned int	IRQ02MON;	//
	volatile unsigned int	IRQ03MON;	//0x40031020
	volatile unsigned int	IRQ04MON;	//
	volatile unsigned int	IRQ05MON;	//0x40031028
	volatile unsigned int	IRQ06MON;
	volatile unsigned int	IRQ07MON;
	volatile unsigned int	IRQ08MON;
	volatile unsigned int	IRQ09MON;
	volatile unsigned int	IRQ10MON;
	volatile unsigned int	IRQ11MON;
	volatile unsigned int	IRQ12MON;
};






