-- ==============================================================
-- RTL generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
-- Version: 2016.2
-- Copyright (C) 1986-2016 Xilinx, Inc. All Rights Reserved.
-- 
-- ===========================================================

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity lcddrv is
port (
    ap_clk : IN STD_LOGIC;
    ap_rst : IN STD_LOGIC;
    ap_start : IN STD_LOGIC;
    ap_done : OUT STD_LOGIC;
    ap_idle : OUT STD_LOGIC;
    ap_ready : OUT STD_LOGIC;
    dummy_tmr_out_i : IN STD_LOGIC_VECTOR (0 downto 0);
    dummy_tmr_out_o : OUT STD_LOGIC_VECTOR (0 downto 0);
    rs_i : IN STD_LOGIC_VECTOR (0 downto 0);
    rs_o : OUT STD_LOGIC_VECTOR (0 downto 0);
    en_i : IN STD_LOGIC_VECTOR (0 downto 0);
    en_o : OUT STD_LOGIC_VECTOR (0 downto 0);
    data_i : IN STD_LOGIC_VECTOR (3 downto 0);
    data_o : OUT STD_LOGIC_VECTOR (3 downto 0);
    ind : IN STD_LOGIC_VECTOR (0 downto 0);
    mem_addr_i : IN STD_LOGIC_VECTOR (4 downto 0);
    mem_addr_o : OUT STD_LOGIC_VECTOR (4 downto 0);
    mem_din : IN STD_LOGIC_VECTOR (7 downto 0);
    mem_req_i : IN STD_LOGIC_VECTOR (0 downto 0);
    mem_req_o : OUT STD_LOGIC_VECTOR (0 downto 0);
    mem_ack : IN STD_LOGIC_VECTOR (0 downto 0) );
end;


architecture behav of lcddrv is 
    attribute CORE_GENERATION_INFO : STRING;
    attribute CORE_GENERATION_INFO of behav : architecture is
    "lcddrv,hls_ip_2016_2,{HLS_INPUT_TYPE=c,HLS_INPUT_FLOAT=0,HLS_INPUT_FIXED=0,HLS_INPUT_PART=xc7a35ticsg324-1l,HLS_INPUT_CLOCK=10.000000,HLS_INPUT_ARCH=others,HLS_SYN_CLOCK=2.862312,HLS_SYN_LAT=-1,HLS_SYN_TPT=none,HLS_SYN_MEM=0,HLS_SYN_DSP=0,HLS_SYN_FF=263,HLS_SYN_LUT=430}";
    constant ap_const_logic_1 : STD_LOGIC := '1';
    constant ap_const_logic_0 : STD_LOGIC := '0';
    constant ap_ST_st1_fsm_0 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000000000001";
    constant ap_ST_st2_fsm_1 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000000000010";
    constant ap_ST_st3_fsm_2 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000000000100";
    constant ap_ST_st4_fsm_3 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000000001000";
    constant ap_ST_st5_fsm_4 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000000010000";
    constant ap_ST_st6_fsm_5 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000000100000";
    constant ap_ST_st7_fsm_6 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000001000000";
    constant ap_ST_st8_fsm_7 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000010000000";
    constant ap_ST_st9_fsm_8 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000100000000";
    constant ap_ST_st10_fsm_9 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000001000000000";
    constant ap_ST_st11_fsm_10 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000010000000000";
    constant ap_ST_st12_fsm_11 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000100000000000";
    constant ap_ST_st13_fsm_12 : STD_LOGIC_VECTOR (21 downto 0) := "0000000001000000000000";
    constant ap_ST_st14_fsm_13 : STD_LOGIC_VECTOR (21 downto 0) := "0000000010000000000000";
    constant ap_ST_st15_fsm_14 : STD_LOGIC_VECTOR (21 downto 0) := "0000000100000000000000";
    constant ap_ST_st16_fsm_15 : STD_LOGIC_VECTOR (21 downto 0) := "0000001000000000000000";
    constant ap_ST_st17_fsm_16 : STD_LOGIC_VECTOR (21 downto 0) := "0000010000000000000000";
    constant ap_ST_st18_fsm_17 : STD_LOGIC_VECTOR (21 downto 0) := "0000100000000000000000";
    constant ap_ST_st19_fsm_18 : STD_LOGIC_VECTOR (21 downto 0) := "0001000000000000000000";
    constant ap_ST_st20_fsm_19 : STD_LOGIC_VECTOR (21 downto 0) := "0010000000000000000000";
    constant ap_ST_st21_fsm_20 : STD_LOGIC_VECTOR (21 downto 0) := "0100000000000000000000";
    constant ap_ST_st22_fsm_21 : STD_LOGIC_VECTOR (21 downto 0) := "1000000000000000000000";
    constant ap_const_lv32_0 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000000";
    constant ap_const_lv1_1 : STD_LOGIC_VECTOR (0 downto 0) := "1";
    constant ap_const_lv1_0 : STD_LOGIC_VECTOR (0 downto 0) := "0";
    constant ap_const_lv4_0 : STD_LOGIC_VECTOR (3 downto 0) := "0000";
    constant ap_const_lv5_0 : STD_LOGIC_VECTOR (4 downto 0) := "00000";
    constant ap_const_lv32_9 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001001";
    constant ap_const_lv32_11 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000010001";
    constant ap_const_lv32_8 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001000";
    constant ap_const_lv32_10 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000010000";
    constant ap_const_lv32_7 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000111";
    constant ap_const_lv32_C : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001100";
    constant ap_const_lv6_10 : STD_LOGIC_VECTOR (5 downto 0) := "010000";
    constant ap_const_lv32_F : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001111";
    constant ap_const_lv32_14 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000010100";
    constant ap_const_lv32_2 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000010";
    constant ap_const_lv32_3 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000011";
    constant ap_const_lv32_4 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000100";
    constant ap_const_lv32_6 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000110";
    constant ap_const_lv32_B : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001011";
    constant ap_const_lv32_E : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001110";
    constant ap_const_lv32_13 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000010011";
    constant ap_const_lv32_5 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000101";
    constant ap_const_lv32_D : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001101";
    constant ap_const_lv32_A : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001010";
    constant ap_const_lv32_12 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000010010";
    constant ap_const_lv4_8 : STD_LOGIC_VECTOR (3 downto 0) := "1000";
    constant ap_const_lv4_C : STD_LOGIC_VECTOR (3 downto 0) := "1100";
    constant ap_const_lv25_989680 : STD_LOGIC_VECTOR (24 downto 0) := "0100110001001011010000000";
    constant ap_const_lv32_15 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000010101";
    constant ap_const_lv5_10 : STD_LOGIC_VECTOR (4 downto 0) := "10000";
    constant ap_const_lv5_1 : STD_LOGIC_VECTOR (4 downto 0) := "00001";
    constant ap_const_lv6_20 : STD_LOGIC_VECTOR (5 downto 0) := "100000";
    constant ap_const_lv6_1 : STD_LOGIC_VECTOR (5 downto 0) := "000001";

    signal ap_CS_fsm : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000000000001";
    attribute fsm_encoding : string;
    attribute fsm_encoding of ap_CS_fsm : signal is "none";
    signal ap_sig_cseq_ST_st1_fsm_0 : STD_LOGIC;
    signal ap_sig_37 : BOOLEAN;
    signal dummy_tmr_out_0_data_reg : STD_LOGIC_VECTOR (0 downto 0) := "0";
    signal dummy_tmr_out_0_vld_reg : STD_LOGIC := '0';
    signal dummy_tmr_out_0_ack_out : STD_LOGIC;
    signal dummy_tmr_out_1_data_reg : STD_LOGIC_VECTOR (0 downto 0) := "0";
    signal dummy_tmr_out_1_data_in : STD_LOGIC_VECTOR (0 downto 0);
    signal dummy_tmr_out_1_vld_reg : STD_LOGIC := '0';
    signal dummy_tmr_out_1_vld_in : STD_LOGIC;
    signal rs_1_data_reg : STD_LOGIC_VECTOR (0 downto 0) := "0";
    signal rs_1_data_in : STD_LOGIC_VECTOR (0 downto 0);
    signal rs_1_vld_reg : STD_LOGIC := '0';
    signal rs_1_vld_in : STD_LOGIC;
    signal en_1_data_reg : STD_LOGIC_VECTOR (0 downto 0) := "0";
    signal en_1_data_in : STD_LOGIC_VECTOR (0 downto 0);
    signal en_1_vld_reg : STD_LOGIC := '0';
    signal en_1_vld_in : STD_LOGIC;
    signal data_1_data_reg : STD_LOGIC_VECTOR (3 downto 0) := "0000";
    signal data_1_data_in : STD_LOGIC_VECTOR (3 downto 0);
    signal data_1_vld_reg : STD_LOGIC := '0';
    signal data_1_vld_in : STD_LOGIC;
    signal mem_addr_1_data_reg : STD_LOGIC_VECTOR (4 downto 0) := "00000";
    signal mem_addr_1_vld_reg : STD_LOGIC := '0';
    signal mem_addr_1_vld_in : STD_LOGIC;
    signal mem_req_1_data_reg : STD_LOGIC_VECTOR (0 downto 0) := "0";
    signal mem_req_1_vld_reg : STD_LOGIC := '0';
    signal mem_req_1_vld_in : STD_LOGIC;
    signal reg_231 : STD_LOGIC_VECTOR (3 downto 0);
    signal ap_sig_cseq_ST_st10_fsm_9 : STD_LOGIC;
    signal ap_sig_381 : BOOLEAN;
    signal grp_lcddrv_read_mem_fu_206_ap_done : STD_LOGIC;
    signal ap_sig_cseq_ST_st18_fsm_17 : STD_LOGIC;
    signal ap_sig_392 : BOOLEAN;
    signal pos_2_fu_242_p2 : STD_LOGIC_VECTOR (4 downto 0);
    signal pos_2_reg_276 : STD_LOGIC_VECTOR (4 downto 0);
    signal ap_sig_cseq_ST_st9_fsm_8 : STD_LOGIC;
    signal ap_sig_403 : BOOLEAN;
    signal tmp_2_fu_248_p1 : STD_LOGIC_VECTOR (3 downto 0);
    signal tmp_2_reg_281 : STD_LOGIC_VECTOR (3 downto 0);
    signal tmp_3_fu_258_p1 : STD_LOGIC_VECTOR (4 downto 0);
    signal tmp_3_reg_289 : STD_LOGIC_VECTOR (4 downto 0);
    signal ap_sig_cseq_ST_st17_fsm_16 : STD_LOGIC;
    signal ap_sig_414 : BOOLEAN;
    signal exitcond_fu_252_p2 : STD_LOGIC_VECTOR (0 downto 0);
    signal pos_3_fu_263_p2 : STD_LOGIC_VECTOR (5 downto 0);
    signal pos_3_reg_294 : STD_LOGIC_VECTOR (5 downto 0);
    signal tmp_4_fu_269_p1 : STD_LOGIC_VECTOR (3 downto 0);
    signal tmp_4_reg_299 : STD_LOGIC_VECTOR (3 downto 0);
    signal grp_lcddrv_init_lcd_fu_167_ap_start : STD_LOGIC;
    signal grp_lcddrv_init_lcd_fu_167_ap_done : STD_LOGIC;
    signal grp_lcddrv_init_lcd_fu_167_ap_idle : STD_LOGIC;
    signal grp_lcddrv_init_lcd_fu_167_ap_ready : STD_LOGIC;
    signal grp_lcddrv_init_lcd_fu_167_dummy_tmr_out_o : STD_LOGIC_VECTOR (0 downto 0);
    signal grp_lcddrv_init_lcd_fu_167_dummy_tmr_out_o_ap_vld : STD_LOGIC;
    signal grp_lcddrv_init_lcd_fu_167_en : STD_LOGIC_VECTOR (0 downto 0);
    signal grp_lcddrv_init_lcd_fu_167_en_ap_vld : STD_LOGIC;
    signal grp_lcddrv_init_lcd_fu_167_rs : STD_LOGIC_VECTOR (0 downto 0);
    signal grp_lcddrv_init_lcd_fu_167_rs_ap_vld : STD_LOGIC;
    signal grp_lcddrv_init_lcd_fu_167_data : STD_LOGIC_VECTOR (3 downto 0);
    signal grp_lcddrv_init_lcd_fu_167_data_ap_vld : STD_LOGIC;
    signal grp_lcddrv_lcd_send_cmd_fu_179_ap_start : STD_LOGIC;
    signal grp_lcddrv_lcd_send_cmd_fu_179_ap_done : STD_LOGIC;
    signal grp_lcddrv_lcd_send_cmd_fu_179_ap_idle : STD_LOGIC;
    signal grp_lcddrv_lcd_send_cmd_fu_179_ap_ready : STD_LOGIC;
    signal grp_lcddrv_lcd_send_cmd_fu_179_mode : STD_LOGIC_VECTOR (0 downto 0);
    signal grp_lcddrv_lcd_send_cmd_fu_179_wd : STD_LOGIC_VECTOR (3 downto 0);
    signal grp_lcddrv_lcd_send_cmd_fu_179_en : STD_LOGIC_VECTOR (0 downto 0);
    signal grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld : STD_LOGIC;
    signal grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o : STD_LOGIC_VECTOR (0 downto 0);
    signal grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld : STD_LOGIC;
    signal grp_lcddrv_lcd_send_cmd_fu_179_rs : STD_LOGIC_VECTOR (0 downto 0);
    signal grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld : STD_LOGIC;
    signal grp_lcddrv_lcd_send_cmd_fu_179_data : STD_LOGIC_VECTOR (3 downto 0);
    signal grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld : STD_LOGIC;
    signal grp_lcddrv_wait_tmr_fu_198_ap_start : STD_LOGIC;
    signal grp_lcddrv_wait_tmr_fu_198_ap_done : STD_LOGIC;
    signal grp_lcddrv_wait_tmr_fu_198_ap_idle : STD_LOGIC;
    signal grp_lcddrv_wait_tmr_fu_198_ap_ready : STD_LOGIC;
    signal grp_lcddrv_wait_tmr_fu_198_dummy_tmr_out_o : STD_LOGIC_VECTOR (0 downto 0);
    signal grp_lcddrv_wait_tmr_fu_198_dummy_tmr_out_o_ap_vld : STD_LOGIC;
    signal grp_lcddrv_read_mem_fu_206_ap_start : STD_LOGIC;
    signal grp_lcddrv_read_mem_fu_206_ap_idle : STD_LOGIC;
    signal grp_lcddrv_read_mem_fu_206_ap_ready : STD_LOGIC;
    signal grp_lcddrv_read_mem_fu_206_addr : STD_LOGIC_VECTOR (4 downto 0);
    signal grp_lcddrv_read_mem_fu_206_mem_addr : STD_LOGIC_VECTOR (4 downto 0);
    signal grp_lcddrv_read_mem_fu_206_mem_addr_ap_vld : STD_LOGIC;
    signal grp_lcddrv_read_mem_fu_206_mem_req : STD_LOGIC_VECTOR (0 downto 0);
    signal grp_lcddrv_read_mem_fu_206_mem_req_ap_vld : STD_LOGIC;
    signal grp_lcddrv_read_mem_fu_206_ap_return : STD_LOGIC_VECTOR (7 downto 0);
    signal pos_reg_144 : STD_LOGIC_VECTOR (4 downto 0);
    signal ap_sig_cseq_ST_st8_fsm_7 : STD_LOGIC;
    signal ap_sig_485 : BOOLEAN;
    signal ap_sig_cseq_ST_st13_fsm_12 : STD_LOGIC;
    signal ap_sig_495 : BOOLEAN;
    signal pos_1_reg_156 : STD_LOGIC_VECTOR (5 downto 0);
    signal ap_sig_cseq_ST_st16_fsm_15 : STD_LOGIC;
    signal ap_sig_506 : BOOLEAN;
    signal ap_sig_cseq_ST_st21_fsm_20 : STD_LOGIC;
    signal ap_sig_514 : BOOLEAN;
    signal ap_reg_grp_lcddrv_init_lcd_fu_167_ap_start : STD_LOGIC := '0';
    signal ap_sig_cseq_ST_st3_fsm_2 : STD_LOGIC;
    signal ap_sig_524 : BOOLEAN;
    signal ap_sig_cseq_ST_st4_fsm_3 : STD_LOGIC;
    signal ap_sig_531 : BOOLEAN;
    signal ap_reg_grp_lcddrv_lcd_send_cmd_fu_179_ap_start : STD_LOGIC := '0';
    signal ap_sig_cseq_ST_st5_fsm_4 : STD_LOGIC;
    signal ap_sig_548 : BOOLEAN;
    signal ap_sig_cseq_ST_st7_fsm_6 : STD_LOGIC;
    signal ap_sig_555 : BOOLEAN;
    signal exitcond1_fu_236_p2 : STD_LOGIC_VECTOR (0 downto 0);
    signal ap_sig_cseq_ST_st12_fsm_11 : STD_LOGIC;
    signal ap_sig_569 : BOOLEAN;
    signal ap_sig_cseq_ST_st15_fsm_14 : STD_LOGIC;
    signal ap_sig_577 : BOOLEAN;
    signal ap_sig_cseq_ST_st20_fsm_19 : STD_LOGIC;
    signal ap_sig_586 : BOOLEAN;
    signal ap_sig_cseq_ST_st6_fsm_5 : STD_LOGIC;
    signal ap_sig_594 : BOOLEAN;
    signal ap_sig_cseq_ST_st14_fsm_13 : STD_LOGIC;
    signal ap_sig_602 : BOOLEAN;
    signal ap_sig_cseq_ST_st11_fsm_10 : STD_LOGIC;
    signal ap_sig_610 : BOOLEAN;
    signal ap_sig_cseq_ST_st19_fsm_18 : STD_LOGIC;
    signal ap_sig_619 : BOOLEAN;
    signal ap_reg_grp_lcddrv_wait_tmr_fu_198_ap_start : STD_LOGIC := '0';
    signal ap_sig_cseq_ST_st22_fsm_21 : STD_LOGIC;
    signal ap_sig_706 : BOOLEAN;
    signal ap_reg_grp_lcddrv_read_mem_fu_206_ap_start : STD_LOGIC := '0';
    signal ap_NS_fsm : STD_LOGIC_VECTOR (21 downto 0);

    component lcddrv_init_lcd IS
    port (
        ap_clk : IN STD_LOGIC;
        ap_rst : IN STD_LOGIC;
        ap_start : IN STD_LOGIC;
        ap_done : OUT STD_LOGIC;
        ap_idle : OUT STD_LOGIC;
        ap_ready : OUT STD_LOGIC;
        dummy_tmr_out_i : IN STD_LOGIC_VECTOR (0 downto 0);
        dummy_tmr_out_o : OUT STD_LOGIC_VECTOR (0 downto 0);
        dummy_tmr_out_o_ap_vld : OUT STD_LOGIC;
        en : OUT STD_LOGIC_VECTOR (0 downto 0);
        en_ap_vld : OUT STD_LOGIC;
        rs : OUT STD_LOGIC_VECTOR (0 downto 0);
        rs_ap_vld : OUT STD_LOGIC;
        data : OUT STD_LOGIC_VECTOR (3 downto 0);
        data_ap_vld : OUT STD_LOGIC );
    end component;


    component lcddrv_lcd_send_cmd IS
    port (
        ap_clk : IN STD_LOGIC;
        ap_rst : IN STD_LOGIC;
        ap_start : IN STD_LOGIC;
        ap_done : OUT STD_LOGIC;
        ap_idle : OUT STD_LOGIC;
        ap_ready : OUT STD_LOGIC;
        mode : IN STD_LOGIC_VECTOR (0 downto 0);
        wd : IN STD_LOGIC_VECTOR (3 downto 0);
        en : OUT STD_LOGIC_VECTOR (0 downto 0);
        en_ap_vld : OUT STD_LOGIC;
        dummy_tmr_out_i : IN STD_LOGIC_VECTOR (0 downto 0);
        dummy_tmr_out_o : OUT STD_LOGIC_VECTOR (0 downto 0);
        dummy_tmr_out_o_ap_vld : OUT STD_LOGIC;
        rs : OUT STD_LOGIC_VECTOR (0 downto 0);
        rs_ap_vld : OUT STD_LOGIC;
        data : OUT STD_LOGIC_VECTOR (3 downto 0);
        data_ap_vld : OUT STD_LOGIC );
    end component;


    component lcddrv_wait_tmr IS
    port (
        ap_clk : IN STD_LOGIC;
        ap_rst : IN STD_LOGIC;
        ap_start : IN STD_LOGIC;
        ap_done : OUT STD_LOGIC;
        ap_idle : OUT STD_LOGIC;
        ap_ready : OUT STD_LOGIC;
        tmr : IN STD_LOGIC_VECTOR (24 downto 0);
        dummy_tmr_out_i : IN STD_LOGIC_VECTOR (0 downto 0);
        dummy_tmr_out_o : OUT STD_LOGIC_VECTOR (0 downto 0);
        dummy_tmr_out_o_ap_vld : OUT STD_LOGIC );
    end component;


    component lcddrv_read_mem IS
    port (
        ap_clk : IN STD_LOGIC;
        ap_rst : IN STD_LOGIC;
        ap_start : IN STD_LOGIC;
        ap_done : OUT STD_LOGIC;
        ap_idle : OUT STD_LOGIC;
        ap_ready : OUT STD_LOGIC;
        addr : IN STD_LOGIC_VECTOR (4 downto 0);
        mem_addr : OUT STD_LOGIC_VECTOR (4 downto 0);
        mem_addr_ap_vld : OUT STD_LOGIC;
        mem_req : OUT STD_LOGIC_VECTOR (0 downto 0);
        mem_req_ap_vld : OUT STD_LOGIC;
        mem_din : IN STD_LOGIC_VECTOR (7 downto 0);
        mem_ack : IN STD_LOGIC_VECTOR (0 downto 0);
        ap_return : OUT STD_LOGIC_VECTOR (7 downto 0) );
    end component;



begin
    grp_lcddrv_init_lcd_fu_167 : component lcddrv_init_lcd
    port map (
        ap_clk => ap_clk,
        ap_rst => ap_rst,
        ap_start => grp_lcddrv_init_lcd_fu_167_ap_start,
        ap_done => grp_lcddrv_init_lcd_fu_167_ap_done,
        ap_idle => grp_lcddrv_init_lcd_fu_167_ap_idle,
        ap_ready => grp_lcddrv_init_lcd_fu_167_ap_ready,
        dummy_tmr_out_i => dummy_tmr_out_0_data_reg,
        dummy_tmr_out_o => grp_lcddrv_init_lcd_fu_167_dummy_tmr_out_o,
        dummy_tmr_out_o_ap_vld => grp_lcddrv_init_lcd_fu_167_dummy_tmr_out_o_ap_vld,
        en => grp_lcddrv_init_lcd_fu_167_en,
        en_ap_vld => grp_lcddrv_init_lcd_fu_167_en_ap_vld,
        rs => grp_lcddrv_init_lcd_fu_167_rs,
        rs_ap_vld => grp_lcddrv_init_lcd_fu_167_rs_ap_vld,
        data => grp_lcddrv_init_lcd_fu_167_data,
        data_ap_vld => grp_lcddrv_init_lcd_fu_167_data_ap_vld);

    grp_lcddrv_lcd_send_cmd_fu_179 : component lcddrv_lcd_send_cmd
    port map (
        ap_clk => ap_clk,
        ap_rst => ap_rst,
        ap_start => grp_lcddrv_lcd_send_cmd_fu_179_ap_start,
        ap_done => grp_lcddrv_lcd_send_cmd_fu_179_ap_done,
        ap_idle => grp_lcddrv_lcd_send_cmd_fu_179_ap_idle,
        ap_ready => grp_lcddrv_lcd_send_cmd_fu_179_ap_ready,
        mode => grp_lcddrv_lcd_send_cmd_fu_179_mode,
        wd => grp_lcddrv_lcd_send_cmd_fu_179_wd,
        en => grp_lcddrv_lcd_send_cmd_fu_179_en,
        en_ap_vld => grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld,
        dummy_tmr_out_i => dummy_tmr_out_0_data_reg,
        dummy_tmr_out_o => grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o,
        dummy_tmr_out_o_ap_vld => grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld,
        rs => grp_lcddrv_lcd_send_cmd_fu_179_rs,
        rs_ap_vld => grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld,
        data => grp_lcddrv_lcd_send_cmd_fu_179_data,
        data_ap_vld => grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld);

    grp_lcddrv_wait_tmr_fu_198 : component lcddrv_wait_tmr
    port map (
        ap_clk => ap_clk,
        ap_rst => ap_rst,
        ap_start => grp_lcddrv_wait_tmr_fu_198_ap_start,
        ap_done => grp_lcddrv_wait_tmr_fu_198_ap_done,
        ap_idle => grp_lcddrv_wait_tmr_fu_198_ap_idle,
        ap_ready => grp_lcddrv_wait_tmr_fu_198_ap_ready,
        tmr => ap_const_lv25_989680,
        dummy_tmr_out_i => dummy_tmr_out_0_data_reg,
        dummy_tmr_out_o => grp_lcddrv_wait_tmr_fu_198_dummy_tmr_out_o,
        dummy_tmr_out_o_ap_vld => grp_lcddrv_wait_tmr_fu_198_dummy_tmr_out_o_ap_vld);

    grp_lcddrv_read_mem_fu_206 : component lcddrv_read_mem
    port map (
        ap_clk => ap_clk,
        ap_rst => ap_rst,
        ap_start => grp_lcddrv_read_mem_fu_206_ap_start,
        ap_done => grp_lcddrv_read_mem_fu_206_ap_done,
        ap_idle => grp_lcddrv_read_mem_fu_206_ap_idle,
        ap_ready => grp_lcddrv_read_mem_fu_206_ap_ready,
        addr => grp_lcddrv_read_mem_fu_206_addr,
        mem_addr => grp_lcddrv_read_mem_fu_206_mem_addr,
        mem_addr_ap_vld => grp_lcddrv_read_mem_fu_206_mem_addr_ap_vld,
        mem_req => grp_lcddrv_read_mem_fu_206_mem_req,
        mem_req_ap_vld => grp_lcddrv_read_mem_fu_206_mem_req_ap_vld,
        mem_din => mem_din,
        mem_ack => mem_ack,
        ap_return => grp_lcddrv_read_mem_fu_206_ap_return);





    ap_CS_fsm_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_CS_fsm <= ap_ST_st1_fsm_0;
            else
                ap_CS_fsm <= ap_NS_fsm;
            end if;
        end if;
    end process;


    ap_reg_grp_lcddrv_init_lcd_fu_167_ap_start_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_reg_grp_lcddrv_init_lcd_fu_167_ap_start <= ap_const_logic_0;
            else
                if ((ap_const_logic_1 = ap_sig_cseq_ST_st3_fsm_2)) then 
                    ap_reg_grp_lcddrv_init_lcd_fu_167_ap_start <= ap_const_logic_1;
                elsif ((ap_const_logic_1 = grp_lcddrv_init_lcd_fu_167_ap_ready)) then 
                    ap_reg_grp_lcddrv_init_lcd_fu_167_ap_start <= ap_const_logic_0;
                end if; 
            end if;
        end if;
    end process;


    ap_reg_grp_lcddrv_lcd_send_cmd_fu_179_ap_start_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_reg_grp_lcddrv_lcd_send_cmd_fu_179_ap_start <= ap_const_logic_0;
            else
                if ((((ap_const_logic_1 = ap_sig_cseq_ST_st10_fsm_9) and not((ap_const_logic_0 = grp_lcddrv_read_mem_fu_206_ap_done))) or (not((ap_const_logic_0 = grp_lcddrv_read_mem_fu_206_ap_done)) and (ap_const_logic_1 = ap_sig_cseq_ST_st18_fsm_17)) or (ap_const_logic_1 = ap_sig_cseq_ST_st5_fsm_4) or (ap_const_logic_1 = ap_sig_cseq_ST_st7_fsm_6) or ((ap_const_logic_1 = ap_sig_cseq_ST_st9_fsm_8) and not((ap_const_lv1_0 = exitcond1_fu_236_p2))) or (ap_const_logic_1 = ap_sig_cseq_ST_st12_fsm_11) or (ap_const_logic_1 = ap_sig_cseq_ST_st15_fsm_14) or (ap_const_logic_1 = ap_sig_cseq_ST_st20_fsm_19))) then 
                    ap_reg_grp_lcddrv_lcd_send_cmd_fu_179_ap_start <= ap_const_logic_1;
                elsif ((ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_ap_ready)) then 
                    ap_reg_grp_lcddrv_lcd_send_cmd_fu_179_ap_start <= ap_const_logic_0;
                end if; 
            end if;
        end if;
    end process;


    ap_reg_grp_lcddrv_read_mem_fu_206_ap_start_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_reg_grp_lcddrv_read_mem_fu_206_ap_start <= ap_const_logic_0;
            else
                if ((((ap_const_logic_1 = ap_sig_cseq_ST_st17_fsm_16) and (ap_const_lv1_0 = exitcond_fu_252_p2)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st9_fsm_8) and (ap_const_lv1_0 = exitcond1_fu_236_p2)))) then 
                    ap_reg_grp_lcddrv_read_mem_fu_206_ap_start <= ap_const_logic_1;
                elsif ((ap_const_logic_1 = grp_lcddrv_read_mem_fu_206_ap_ready)) then 
                    ap_reg_grp_lcddrv_read_mem_fu_206_ap_start <= ap_const_logic_0;
                end if; 
            end if;
        end if;
    end process;


    ap_reg_grp_lcddrv_wait_tmr_fu_198_ap_start_assign_proc : process(ap_clk)
    begin
        if (ap_clk'event and ap_clk =  '1') then
            if (ap_rst = '1') then
                ap_reg_grp_lcddrv_wait_tmr_fu_198_ap_start <= ap_const_logic_0;
            else
                if (((ap_const_logic_1 = ap_sig_cseq_ST_st17_fsm_16) and not((ap_const_lv1_0 = exitcond_fu_252_p2)))) then 
                    ap_reg_grp_lcddrv_wait_tmr_fu_198_ap_start <= ap_const_logic_1;
                elsif ((ap_const_logic_1 = grp_lcddrv_wait_tmr_fu_198_ap_ready)) then 
                    ap_reg_grp_lcddrv_wait_tmr_fu_198_ap_start <= ap_const_logic_0;
                end if; 
            end if;
        end if;
    end process;


    data_1_vld_reg_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
        end if;
    end process;

    dummy_tmr_out_0_vld_reg_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
        end if;
    end process;

    dummy_tmr_out_1_vld_reg_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
        end if;
    end process;

    en_1_vld_reg_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
        end if;
    end process;

    mem_addr_1_vld_reg_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
        end if;
    end process;

    mem_req_1_vld_reg_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
        end if;
    end process;

    pos_1_reg_156_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (not((ap_const_logic_0 = grp_lcddrv_lcd_send_cmd_fu_179_ap_done))) then
                if ((ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20)) then 
                    pos_1_reg_156 <= pos_3_reg_294;
                elsif ((ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15)) then 
                    pos_1_reg_156 <= ap_const_lv6_10;
                end if;
            end if; 
        end if;
    end process;

    pos_reg_144_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (not((ap_const_logic_0 = grp_lcddrv_lcd_send_cmd_fu_179_ap_done))) then
                if ((ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12)) then 
                    pos_reg_144 <= pos_2_reg_276;
                elsif ((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7)) then 
                    pos_reg_144 <= ap_const_lv5_0;
                end if;
            end if; 
        end if;
    end process;

    rs_1_vld_reg_assign_proc : process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = data_1_vld_in) and (ap_const_logic_0 = data_1_vld_reg)) or (not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = data_1_vld_in) and (ap_const_logic_1 = data_1_vld_reg) and (ap_const_logic_1 = ap_const_logic_1)))) then
                data_1_data_reg <= data_1_data_in;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = ap_const_logic_1) and (ap_const_logic_0 = dummy_tmr_out_0_vld_reg)) or (not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = ap_const_logic_1) and (ap_const_logic_1 = dummy_tmr_out_0_vld_reg) and (ap_const_logic_1 = dummy_tmr_out_0_ack_out)))) then
                dummy_tmr_out_0_data_reg <= dummy_tmr_out_i;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = dummy_tmr_out_1_vld_in) and (ap_const_logic_0 = dummy_tmr_out_1_vld_reg)) or (not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = dummy_tmr_out_1_vld_in) and (ap_const_logic_1 = dummy_tmr_out_1_vld_reg) and (ap_const_logic_1 = ap_const_logic_1)))) then
                dummy_tmr_out_1_data_reg <= dummy_tmr_out_1_data_in;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = en_1_vld_in) and (ap_const_logic_0 = en_1_vld_reg)) or (not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = en_1_vld_in) and (ap_const_logic_1 = en_1_vld_reg) and (ap_const_logic_1 = ap_const_logic_1)))) then
                en_1_data_reg <= en_1_data_in;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = mem_addr_1_vld_in) and (ap_const_logic_0 = mem_addr_1_vld_reg)) or (not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = mem_addr_1_vld_in) and (ap_const_logic_1 = mem_addr_1_vld_reg) and (ap_const_logic_1 = ap_const_logic_1)))) then
                mem_addr_1_data_reg <= grp_lcddrv_read_mem_fu_206_mem_addr;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = mem_req_1_vld_in) and (ap_const_logic_0 = mem_req_1_vld_reg)) or (not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = mem_req_1_vld_in) and (ap_const_logic_1 = mem_req_1_vld_reg) and (ap_const_logic_1 = ap_const_logic_1)))) then
                mem_req_1_data_reg <= grp_lcddrv_read_mem_fu_206_mem_req;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if ((ap_const_logic_1 = ap_sig_cseq_ST_st9_fsm_8)) then
                pos_2_reg_276 <= pos_2_fu_242_p2;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((ap_const_logic_1 = ap_sig_cseq_ST_st17_fsm_16) and (ap_const_lv1_0 = exitcond_fu_252_p2))) then
                pos_3_reg_294 <= pos_3_fu_263_p2;
                tmp_3_reg_289 <= tmp_3_fu_258_p1;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if ((((ap_const_logic_1 = ap_sig_cseq_ST_st10_fsm_9) and not((ap_const_logic_0 = grp_lcddrv_read_mem_fu_206_ap_done))) or (not((ap_const_logic_0 = grp_lcddrv_read_mem_fu_206_ap_done)) and (ap_const_logic_1 = ap_sig_cseq_ST_st18_fsm_17)))) then
                reg_231 <= grp_lcddrv_read_mem_fu_206_ap_return(7 downto 4);
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = rs_1_vld_in) and (ap_const_logic_0 = rs_1_vld_reg)) or (not(((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) and (ap_const_logic_1 = rs_1_vld_in) and (ap_const_logic_1 = rs_1_vld_reg) and (ap_const_logic_1 = ap_const_logic_1)))) then
                rs_1_data_reg <= rs_1_data_in;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if (((ap_const_logic_1 = ap_sig_cseq_ST_st10_fsm_9) and not((ap_const_logic_0 = grp_lcddrv_read_mem_fu_206_ap_done)))) then
                tmp_2_reg_281 <= tmp_2_fu_248_p1;
            end if;
        end if;
    end process;
    process (ap_clk)
    begin
        if (ap_clk'event and ap_clk = '1') then
            if ((not((ap_const_logic_0 = grp_lcddrv_read_mem_fu_206_ap_done)) and (ap_const_logic_1 = ap_sig_cseq_ST_st18_fsm_17))) then
                tmp_4_reg_299 <= tmp_4_fu_269_p1;
            end if;
        end if;
    end process;

    ap_NS_fsm_assign_proc : process (ap_start, ap_CS_fsm, grp_lcddrv_read_mem_fu_206_ap_done, exitcond_fu_252_p2, grp_lcddrv_init_lcd_fu_167_ap_done, grp_lcddrv_lcd_send_cmd_fu_179_ap_done, grp_lcddrv_wait_tmr_fu_198_ap_done, exitcond1_fu_236_p2)
    begin
        case ap_CS_fsm is
            when ap_ST_st1_fsm_0 => 
                if (not((ap_start = ap_const_logic_0))) then
                    ap_NS_fsm <= ap_ST_st2_fsm_1;
                else
                    ap_NS_fsm <= ap_ST_st1_fsm_0;
                end if;
            when ap_ST_st2_fsm_1 => 
                ap_NS_fsm <= ap_ST_st3_fsm_2;
            when ap_ST_st3_fsm_2 => 
                ap_NS_fsm <= ap_ST_st4_fsm_3;
            when ap_ST_st4_fsm_3 => 
                if (not((ap_const_logic_0 = grp_lcddrv_init_lcd_fu_167_ap_done))) then
                    ap_NS_fsm <= ap_ST_st5_fsm_4;
                else
                    ap_NS_fsm <= ap_ST_st4_fsm_3;
                end if;
            when ap_ST_st5_fsm_4 => 
                ap_NS_fsm <= ap_ST_st6_fsm_5;
            when ap_ST_st6_fsm_5 => 
                if (not((ap_const_logic_0 = grp_lcddrv_lcd_send_cmd_fu_179_ap_done))) then
                    ap_NS_fsm <= ap_ST_st7_fsm_6;
                else
                    ap_NS_fsm <= ap_ST_st6_fsm_5;
                end if;
            when ap_ST_st7_fsm_6 => 
                ap_NS_fsm <= ap_ST_st8_fsm_7;
            when ap_ST_st8_fsm_7 => 
                if (not((ap_const_logic_0 = grp_lcddrv_lcd_send_cmd_fu_179_ap_done))) then
                    ap_NS_fsm <= ap_ST_st9_fsm_8;
                else
                    ap_NS_fsm <= ap_ST_st8_fsm_7;
                end if;
            when ap_ST_st9_fsm_8 => 
                if (not((ap_const_lv1_0 = exitcond1_fu_236_p2))) then
                    ap_NS_fsm <= ap_ST_st14_fsm_13;
                else
                    ap_NS_fsm <= ap_ST_st10_fsm_9;
                end if;
            when ap_ST_st10_fsm_9 => 
                if (not((ap_const_logic_0 = grp_lcddrv_read_mem_fu_206_ap_done))) then
                    ap_NS_fsm <= ap_ST_st11_fsm_10;
                else
                    ap_NS_fsm <= ap_ST_st10_fsm_9;
                end if;
            when ap_ST_st11_fsm_10 => 
                if (not((ap_const_logic_0 = grp_lcddrv_lcd_send_cmd_fu_179_ap_done))) then
                    ap_NS_fsm <= ap_ST_st12_fsm_11;
                else
                    ap_NS_fsm <= ap_ST_st11_fsm_10;
                end if;
            when ap_ST_st12_fsm_11 => 
                ap_NS_fsm <= ap_ST_st13_fsm_12;
            when ap_ST_st13_fsm_12 => 
                if (not((ap_const_logic_0 = grp_lcddrv_lcd_send_cmd_fu_179_ap_done))) then
                    ap_NS_fsm <= ap_ST_st9_fsm_8;
                else
                    ap_NS_fsm <= ap_ST_st13_fsm_12;
                end if;
            when ap_ST_st14_fsm_13 => 
                if (not((ap_const_logic_0 = grp_lcddrv_lcd_send_cmd_fu_179_ap_done))) then
                    ap_NS_fsm <= ap_ST_st15_fsm_14;
                else
                    ap_NS_fsm <= ap_ST_st14_fsm_13;
                end if;
            when ap_ST_st15_fsm_14 => 
                ap_NS_fsm <= ap_ST_st16_fsm_15;
            when ap_ST_st16_fsm_15 => 
                if (not((ap_const_logic_0 = grp_lcddrv_lcd_send_cmd_fu_179_ap_done))) then
                    ap_NS_fsm <= ap_ST_st17_fsm_16;
                else
                    ap_NS_fsm <= ap_ST_st16_fsm_15;
                end if;
            when ap_ST_st17_fsm_16 => 
                if (not((ap_const_lv1_0 = exitcond_fu_252_p2))) then
                    ap_NS_fsm <= ap_ST_st22_fsm_21;
                else
                    ap_NS_fsm <= ap_ST_st18_fsm_17;
                end if;
            when ap_ST_st18_fsm_17 => 
                if (not((ap_const_logic_0 = grp_lcddrv_read_mem_fu_206_ap_done))) then
                    ap_NS_fsm <= ap_ST_st19_fsm_18;
                else
                    ap_NS_fsm <= ap_ST_st18_fsm_17;
                end if;
            when ap_ST_st19_fsm_18 => 
                if (not((ap_const_logic_0 = grp_lcddrv_lcd_send_cmd_fu_179_ap_done))) then
                    ap_NS_fsm <= ap_ST_st20_fsm_19;
                else
                    ap_NS_fsm <= ap_ST_st19_fsm_18;
                end if;
            when ap_ST_st20_fsm_19 => 
                ap_NS_fsm <= ap_ST_st21_fsm_20;
            when ap_ST_st21_fsm_20 => 
                if (not((ap_const_logic_0 = grp_lcddrv_lcd_send_cmd_fu_179_ap_done))) then
                    ap_NS_fsm <= ap_ST_st17_fsm_16;
                else
                    ap_NS_fsm <= ap_ST_st21_fsm_20;
                end if;
            when ap_ST_st22_fsm_21 => 
                if (not((ap_const_logic_0 = grp_lcddrv_wait_tmr_fu_198_ap_done))) then
                    ap_NS_fsm <= ap_ST_st5_fsm_4;
                else
                    ap_NS_fsm <= ap_ST_st22_fsm_21;
                end if;
            when others =>  
                ap_NS_fsm <= "XXXXXXXXXXXXXXXXXXXXXX";
        end case;
    end process;
    ap_done <= ap_const_logic_0;

    ap_idle_assign_proc : process(ap_start, ap_sig_cseq_ST_st1_fsm_0)
    begin
        if (((ap_const_logic_0 = ap_start) and (ap_const_logic_1 = ap_sig_cseq_ST_st1_fsm_0))) then 
            ap_idle <= ap_const_logic_1;
        else 
            ap_idle <= ap_const_logic_0;
        end if; 
    end process;

    ap_ready <= ap_const_logic_0;

    ap_sig_37_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_37 <= (ap_CS_fsm(0 downto 0) = ap_const_lv1_1);
    end process;


    ap_sig_381_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_381 <= (ap_const_lv1_1 = ap_CS_fsm(9 downto 9));
    end process;


    ap_sig_392_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_392 <= (ap_const_lv1_1 = ap_CS_fsm(17 downto 17));
    end process;


    ap_sig_403_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_403 <= (ap_const_lv1_1 = ap_CS_fsm(8 downto 8));
    end process;


    ap_sig_414_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_414 <= (ap_const_lv1_1 = ap_CS_fsm(16 downto 16));
    end process;


    ap_sig_485_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_485 <= (ap_const_lv1_1 = ap_CS_fsm(7 downto 7));
    end process;


    ap_sig_495_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_495 <= (ap_const_lv1_1 = ap_CS_fsm(12 downto 12));
    end process;


    ap_sig_506_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_506 <= (ap_const_lv1_1 = ap_CS_fsm(15 downto 15));
    end process;


    ap_sig_514_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_514 <= (ap_const_lv1_1 = ap_CS_fsm(20 downto 20));
    end process;


    ap_sig_524_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_524 <= (ap_const_lv1_1 = ap_CS_fsm(2 downto 2));
    end process;


    ap_sig_531_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_531 <= (ap_const_lv1_1 = ap_CS_fsm(3 downto 3));
    end process;


    ap_sig_548_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_548 <= (ap_const_lv1_1 = ap_CS_fsm(4 downto 4));
    end process;


    ap_sig_555_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_555 <= (ap_const_lv1_1 = ap_CS_fsm(6 downto 6));
    end process;


    ap_sig_569_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_569 <= (ap_const_lv1_1 = ap_CS_fsm(11 downto 11));
    end process;


    ap_sig_577_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_577 <= (ap_const_lv1_1 = ap_CS_fsm(14 downto 14));
    end process;


    ap_sig_586_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_586 <= (ap_const_lv1_1 = ap_CS_fsm(19 downto 19));
    end process;


    ap_sig_594_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_594 <= (ap_const_lv1_1 = ap_CS_fsm(5 downto 5));
    end process;


    ap_sig_602_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_602 <= (ap_const_lv1_1 = ap_CS_fsm(13 downto 13));
    end process;


    ap_sig_610_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_610 <= (ap_const_lv1_1 = ap_CS_fsm(10 downto 10));
    end process;


    ap_sig_619_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_619 <= (ap_const_lv1_1 = ap_CS_fsm(18 downto 18));
    end process;


    ap_sig_706_assign_proc : process(ap_CS_fsm)
    begin
                ap_sig_706 <= (ap_const_lv1_1 = ap_CS_fsm(21 downto 21));
    end process;


    ap_sig_cseq_ST_st10_fsm_9_assign_proc : process(ap_sig_381)
    begin
        if (ap_sig_381) then 
            ap_sig_cseq_ST_st10_fsm_9 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st10_fsm_9 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st11_fsm_10_assign_proc : process(ap_sig_610)
    begin
        if (ap_sig_610) then 
            ap_sig_cseq_ST_st11_fsm_10 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st11_fsm_10 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st12_fsm_11_assign_proc : process(ap_sig_569)
    begin
        if (ap_sig_569) then 
            ap_sig_cseq_ST_st12_fsm_11 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st12_fsm_11 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st13_fsm_12_assign_proc : process(ap_sig_495)
    begin
        if (ap_sig_495) then 
            ap_sig_cseq_ST_st13_fsm_12 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st13_fsm_12 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st14_fsm_13_assign_proc : process(ap_sig_602)
    begin
        if (ap_sig_602) then 
            ap_sig_cseq_ST_st14_fsm_13 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st14_fsm_13 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st15_fsm_14_assign_proc : process(ap_sig_577)
    begin
        if (ap_sig_577) then 
            ap_sig_cseq_ST_st15_fsm_14 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st15_fsm_14 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st16_fsm_15_assign_proc : process(ap_sig_506)
    begin
        if (ap_sig_506) then 
            ap_sig_cseq_ST_st16_fsm_15 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st16_fsm_15 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st17_fsm_16_assign_proc : process(ap_sig_414)
    begin
        if (ap_sig_414) then 
            ap_sig_cseq_ST_st17_fsm_16 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st17_fsm_16 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st18_fsm_17_assign_proc : process(ap_sig_392)
    begin
        if (ap_sig_392) then 
            ap_sig_cseq_ST_st18_fsm_17 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st18_fsm_17 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st19_fsm_18_assign_proc : process(ap_sig_619)
    begin
        if (ap_sig_619) then 
            ap_sig_cseq_ST_st19_fsm_18 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st19_fsm_18 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st1_fsm_0_assign_proc : process(ap_sig_37)
    begin
        if (ap_sig_37) then 
            ap_sig_cseq_ST_st1_fsm_0 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st1_fsm_0 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st20_fsm_19_assign_proc : process(ap_sig_586)
    begin
        if (ap_sig_586) then 
            ap_sig_cseq_ST_st20_fsm_19 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st20_fsm_19 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st21_fsm_20_assign_proc : process(ap_sig_514)
    begin
        if (ap_sig_514) then 
            ap_sig_cseq_ST_st21_fsm_20 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st21_fsm_20 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st22_fsm_21_assign_proc : process(ap_sig_706)
    begin
        if (ap_sig_706) then 
            ap_sig_cseq_ST_st22_fsm_21 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st22_fsm_21 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st3_fsm_2_assign_proc : process(ap_sig_524)
    begin
        if (ap_sig_524) then 
            ap_sig_cseq_ST_st3_fsm_2 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st3_fsm_2 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st4_fsm_3_assign_proc : process(ap_sig_531)
    begin
        if (ap_sig_531) then 
            ap_sig_cseq_ST_st4_fsm_3 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st4_fsm_3 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st5_fsm_4_assign_proc : process(ap_sig_548)
    begin
        if (ap_sig_548) then 
            ap_sig_cseq_ST_st5_fsm_4 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st5_fsm_4 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st6_fsm_5_assign_proc : process(ap_sig_594)
    begin
        if (ap_sig_594) then 
            ap_sig_cseq_ST_st6_fsm_5 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st6_fsm_5 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st7_fsm_6_assign_proc : process(ap_sig_555)
    begin
        if (ap_sig_555) then 
            ap_sig_cseq_ST_st7_fsm_6 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st7_fsm_6 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st8_fsm_7_assign_proc : process(ap_sig_485)
    begin
        if (ap_sig_485) then 
            ap_sig_cseq_ST_st8_fsm_7 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st8_fsm_7 <= ap_const_logic_0;
        end if; 
    end process;


    ap_sig_cseq_ST_st9_fsm_8_assign_proc : process(ap_sig_403)
    begin
        if (ap_sig_403) then 
            ap_sig_cseq_ST_st9_fsm_8 <= ap_const_logic_1;
        else 
            ap_sig_cseq_ST_st9_fsm_8 <= ap_const_logic_0;
        end if; 
    end process;


    data_1_data_in_assign_proc : process(grp_lcddrv_init_lcd_fu_167_data, grp_lcddrv_init_lcd_fu_167_data_ap_vld, grp_lcddrv_lcd_send_cmd_fu_179_data, grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld, ap_sig_cseq_ST_st8_fsm_7, ap_sig_cseq_ST_st13_fsm_12, ap_sig_cseq_ST_st16_fsm_15, ap_sig_cseq_ST_st21_fsm_20, ap_sig_cseq_ST_st4_fsm_3, ap_sig_cseq_ST_st6_fsm_5, ap_sig_cseq_ST_st14_fsm_13, ap_sig_cseq_ST_st11_fsm_10, ap_sig_cseq_ST_st19_fsm_18)
    begin
        if ((((ap_const_logic_1 = ap_sig_cseq_ST_st6_fsm_5) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st14_fsm_13) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st11_fsm_10) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st19_fsm_18) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld)))) then 
            data_1_data_in <= grp_lcddrv_lcd_send_cmd_fu_179_data;
        elsif (((ap_const_logic_1 = ap_sig_cseq_ST_st4_fsm_3) and (ap_const_logic_1 = grp_lcddrv_init_lcd_fu_167_data_ap_vld))) then 
            data_1_data_in <= grp_lcddrv_init_lcd_fu_167_data;
        else 
            data_1_data_in <= "XXXX";
        end if; 
    end process;


    data_1_vld_in_assign_proc : process(grp_lcddrv_init_lcd_fu_167_data_ap_vld, grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld, ap_sig_cseq_ST_st8_fsm_7, ap_sig_cseq_ST_st13_fsm_12, ap_sig_cseq_ST_st16_fsm_15, ap_sig_cseq_ST_st21_fsm_20, ap_sig_cseq_ST_st4_fsm_3, ap_sig_cseq_ST_st6_fsm_5, ap_sig_cseq_ST_st14_fsm_13, ap_sig_cseq_ST_st11_fsm_10, ap_sig_cseq_ST_st19_fsm_18)
    begin
        if (((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7) or (ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12) or (ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15) or (ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20) or (ap_const_logic_1 = ap_sig_cseq_ST_st6_fsm_5) or (ap_const_logic_1 = ap_sig_cseq_ST_st14_fsm_13) or (ap_const_logic_1 = ap_sig_cseq_ST_st11_fsm_10) or (ap_const_logic_1 = ap_sig_cseq_ST_st19_fsm_18))) then 
            data_1_vld_in <= grp_lcddrv_lcd_send_cmd_fu_179_data_ap_vld;
        elsif ((ap_const_logic_1 = ap_sig_cseq_ST_st4_fsm_3)) then 
            data_1_vld_in <= grp_lcddrv_init_lcd_fu_167_data_ap_vld;
        else 
            data_1_vld_in <= ap_const_logic_0;
        end if; 
    end process;

    data_o <= data_1_data_reg;
    dummy_tmr_out_0_ack_out <= ap_const_logic_0;

    dummy_tmr_out_1_data_in_assign_proc : process(grp_lcddrv_init_lcd_fu_167_dummy_tmr_out_o, grp_lcddrv_init_lcd_fu_167_dummy_tmr_out_o_ap_vld, grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o, grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld, grp_lcddrv_wait_tmr_fu_198_dummy_tmr_out_o, grp_lcddrv_wait_tmr_fu_198_dummy_tmr_out_o_ap_vld, ap_sig_cseq_ST_st8_fsm_7, ap_sig_cseq_ST_st13_fsm_12, ap_sig_cseq_ST_st16_fsm_15, ap_sig_cseq_ST_st21_fsm_20, ap_sig_cseq_ST_st4_fsm_3, ap_sig_cseq_ST_st6_fsm_5, ap_sig_cseq_ST_st14_fsm_13, ap_sig_cseq_ST_st11_fsm_10, ap_sig_cseq_ST_st19_fsm_18, ap_sig_cseq_ST_st22_fsm_21)
    begin
        if (((ap_const_logic_1 = ap_sig_cseq_ST_st22_fsm_21) and (ap_const_logic_1 = grp_lcddrv_wait_tmr_fu_198_dummy_tmr_out_o_ap_vld))) then 
            dummy_tmr_out_1_data_in <= grp_lcddrv_wait_tmr_fu_198_dummy_tmr_out_o;
        elsif ((((ap_const_logic_1 = ap_sig_cseq_ST_st6_fsm_5) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st14_fsm_13) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st11_fsm_10) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st19_fsm_18) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld)))) then 
            dummy_tmr_out_1_data_in <= grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o;
        elsif (((ap_const_logic_1 = ap_sig_cseq_ST_st4_fsm_3) and (ap_const_logic_1 = grp_lcddrv_init_lcd_fu_167_dummy_tmr_out_o_ap_vld))) then 
            dummy_tmr_out_1_data_in <= grp_lcddrv_init_lcd_fu_167_dummy_tmr_out_o;
        else 
            dummy_tmr_out_1_data_in <= "X";
        end if; 
    end process;


    dummy_tmr_out_1_vld_in_assign_proc : process(grp_lcddrv_init_lcd_fu_167_dummy_tmr_out_o_ap_vld, grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld, grp_lcddrv_wait_tmr_fu_198_dummy_tmr_out_o_ap_vld, ap_sig_cseq_ST_st8_fsm_7, ap_sig_cseq_ST_st13_fsm_12, ap_sig_cseq_ST_st16_fsm_15, ap_sig_cseq_ST_st21_fsm_20, ap_sig_cseq_ST_st4_fsm_3, ap_sig_cseq_ST_st6_fsm_5, ap_sig_cseq_ST_st14_fsm_13, ap_sig_cseq_ST_st11_fsm_10, ap_sig_cseq_ST_st19_fsm_18, ap_sig_cseq_ST_st22_fsm_21)
    begin
        if ((ap_const_logic_1 = ap_sig_cseq_ST_st22_fsm_21)) then 
            dummy_tmr_out_1_vld_in <= grp_lcddrv_wait_tmr_fu_198_dummy_tmr_out_o_ap_vld;
        elsif (((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7) or (ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12) or (ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15) or (ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20) or (ap_const_logic_1 = ap_sig_cseq_ST_st6_fsm_5) or (ap_const_logic_1 = ap_sig_cseq_ST_st14_fsm_13) or (ap_const_logic_1 = ap_sig_cseq_ST_st11_fsm_10) or (ap_const_logic_1 = ap_sig_cseq_ST_st19_fsm_18))) then 
            dummy_tmr_out_1_vld_in <= grp_lcddrv_lcd_send_cmd_fu_179_dummy_tmr_out_o_ap_vld;
        elsif ((ap_const_logic_1 = ap_sig_cseq_ST_st4_fsm_3)) then 
            dummy_tmr_out_1_vld_in <= grp_lcddrv_init_lcd_fu_167_dummy_tmr_out_o_ap_vld;
        else 
            dummy_tmr_out_1_vld_in <= ap_const_logic_0;
        end if; 
    end process;

    dummy_tmr_out_o <= dummy_tmr_out_1_data_reg;

    en_1_data_in_assign_proc : process(grp_lcddrv_init_lcd_fu_167_en, grp_lcddrv_init_lcd_fu_167_en_ap_vld, grp_lcddrv_lcd_send_cmd_fu_179_en, grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld, ap_sig_cseq_ST_st8_fsm_7, ap_sig_cseq_ST_st13_fsm_12, ap_sig_cseq_ST_st16_fsm_15, ap_sig_cseq_ST_st21_fsm_20, ap_sig_cseq_ST_st4_fsm_3, ap_sig_cseq_ST_st6_fsm_5, ap_sig_cseq_ST_st14_fsm_13, ap_sig_cseq_ST_st11_fsm_10, ap_sig_cseq_ST_st19_fsm_18)
    begin
        if ((((ap_const_logic_1 = ap_sig_cseq_ST_st6_fsm_5) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st14_fsm_13) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st11_fsm_10) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st19_fsm_18) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld)))) then 
            en_1_data_in <= grp_lcddrv_lcd_send_cmd_fu_179_en;
        elsif (((ap_const_logic_1 = ap_sig_cseq_ST_st4_fsm_3) and (ap_const_logic_1 = grp_lcddrv_init_lcd_fu_167_en_ap_vld))) then 
            en_1_data_in <= grp_lcddrv_init_lcd_fu_167_en;
        else 
            en_1_data_in <= "X";
        end if; 
    end process;


    en_1_vld_in_assign_proc : process(grp_lcddrv_init_lcd_fu_167_en_ap_vld, grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld, ap_sig_cseq_ST_st8_fsm_7, ap_sig_cseq_ST_st13_fsm_12, ap_sig_cseq_ST_st16_fsm_15, ap_sig_cseq_ST_st21_fsm_20, ap_sig_cseq_ST_st4_fsm_3, ap_sig_cseq_ST_st6_fsm_5, ap_sig_cseq_ST_st14_fsm_13, ap_sig_cseq_ST_st11_fsm_10, ap_sig_cseq_ST_st19_fsm_18)
    begin
        if (((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7) or (ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12) or (ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15) or (ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20) or (ap_const_logic_1 = ap_sig_cseq_ST_st6_fsm_5) or (ap_const_logic_1 = ap_sig_cseq_ST_st14_fsm_13) or (ap_const_logic_1 = ap_sig_cseq_ST_st11_fsm_10) or (ap_const_logic_1 = ap_sig_cseq_ST_st19_fsm_18))) then 
            en_1_vld_in <= grp_lcddrv_lcd_send_cmd_fu_179_en_ap_vld;
        elsif ((ap_const_logic_1 = ap_sig_cseq_ST_st4_fsm_3)) then 
            en_1_vld_in <= grp_lcddrv_init_lcd_fu_167_en_ap_vld;
        else 
            en_1_vld_in <= ap_const_logic_0;
        end if; 
    end process;

    en_o <= en_1_data_reg;
    exitcond1_fu_236_p2 <= "1" when (pos_reg_144 = ap_const_lv5_10) else "0";
    exitcond_fu_252_p2 <= "1" when (pos_1_reg_156 = ap_const_lv6_20) else "0";
    grp_lcddrv_init_lcd_fu_167_ap_start <= ap_reg_grp_lcddrv_init_lcd_fu_167_ap_start;
    grp_lcddrv_lcd_send_cmd_fu_179_ap_start <= ap_reg_grp_lcddrv_lcd_send_cmd_fu_179_ap_start;

    grp_lcddrv_lcd_send_cmd_fu_179_mode_assign_proc : process(ap_sig_cseq_ST_st8_fsm_7, ap_sig_cseq_ST_st13_fsm_12, ap_sig_cseq_ST_st16_fsm_15, ap_sig_cseq_ST_st21_fsm_20, ap_sig_cseq_ST_st6_fsm_5, ap_sig_cseq_ST_st14_fsm_13, ap_sig_cseq_ST_st11_fsm_10, ap_sig_cseq_ST_st19_fsm_18)
    begin
        if (((ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12) or (ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20) or (ap_const_logic_1 = ap_sig_cseq_ST_st11_fsm_10) or (ap_const_logic_1 = ap_sig_cseq_ST_st19_fsm_18))) then 
            grp_lcddrv_lcd_send_cmd_fu_179_mode <= ap_const_lv1_1;
        elsif (((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7) or (ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15) or (ap_const_logic_1 = ap_sig_cseq_ST_st6_fsm_5) or (ap_const_logic_1 = ap_sig_cseq_ST_st14_fsm_13))) then 
            grp_lcddrv_lcd_send_cmd_fu_179_mode <= ap_const_lv1_0;
        else 
            grp_lcddrv_lcd_send_cmd_fu_179_mode <= "X";
        end if; 
    end process;


    grp_lcddrv_lcd_send_cmd_fu_179_wd_assign_proc : process(reg_231, tmp_2_reg_281, tmp_4_reg_299, ap_sig_cseq_ST_st8_fsm_7, ap_sig_cseq_ST_st13_fsm_12, ap_sig_cseq_ST_st16_fsm_15, ap_sig_cseq_ST_st21_fsm_20, ap_sig_cseq_ST_st6_fsm_5, ap_sig_cseq_ST_st14_fsm_13, ap_sig_cseq_ST_st11_fsm_10, ap_sig_cseq_ST_st19_fsm_18)
    begin
        if ((ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20)) then 
            grp_lcddrv_lcd_send_cmd_fu_179_wd <= tmp_4_reg_299;
        elsif ((ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12)) then 
            grp_lcddrv_lcd_send_cmd_fu_179_wd <= tmp_2_reg_281;
        elsif (((ap_const_logic_1 = ap_sig_cseq_ST_st11_fsm_10) or (ap_const_logic_1 = ap_sig_cseq_ST_st19_fsm_18))) then 
            grp_lcddrv_lcd_send_cmd_fu_179_wd <= reg_231;
        elsif ((ap_const_logic_1 = ap_sig_cseq_ST_st14_fsm_13)) then 
            grp_lcddrv_lcd_send_cmd_fu_179_wd <= ap_const_lv4_C;
        elsif (((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7) or (ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15))) then 
            grp_lcddrv_lcd_send_cmd_fu_179_wd <= ap_const_lv4_0;
        elsif ((ap_const_logic_1 = ap_sig_cseq_ST_st6_fsm_5)) then 
            grp_lcddrv_lcd_send_cmd_fu_179_wd <= ap_const_lv4_8;
        else 
            grp_lcddrv_lcd_send_cmd_fu_179_wd <= "XXXX";
        end if; 
    end process;


    grp_lcddrv_read_mem_fu_206_addr_assign_proc : process(ap_sig_cseq_ST_st10_fsm_9, ap_sig_cseq_ST_st18_fsm_17, tmp_3_reg_289, pos_reg_144)
    begin
        if ((ap_const_logic_1 = ap_sig_cseq_ST_st18_fsm_17)) then 
            grp_lcddrv_read_mem_fu_206_addr <= tmp_3_reg_289;
        elsif ((ap_const_logic_1 = ap_sig_cseq_ST_st10_fsm_9)) then 
            grp_lcddrv_read_mem_fu_206_addr <= pos_reg_144;
        else 
            grp_lcddrv_read_mem_fu_206_addr <= "XXXXX";
        end if; 
    end process;

    grp_lcddrv_read_mem_fu_206_ap_start <= ap_reg_grp_lcddrv_read_mem_fu_206_ap_start;
    grp_lcddrv_wait_tmr_fu_198_ap_start <= ap_reg_grp_lcddrv_wait_tmr_fu_198_ap_start;

    mem_addr_1_vld_in_assign_proc : process(ap_sig_cseq_ST_st10_fsm_9, ap_sig_cseq_ST_st18_fsm_17, grp_lcddrv_read_mem_fu_206_mem_addr_ap_vld)
    begin
        if (((ap_const_logic_1 = ap_sig_cseq_ST_st10_fsm_9) or (ap_const_logic_1 = ap_sig_cseq_ST_st18_fsm_17))) then 
            mem_addr_1_vld_in <= grp_lcddrv_read_mem_fu_206_mem_addr_ap_vld;
        else 
            mem_addr_1_vld_in <= ap_const_logic_0;
        end if; 
    end process;

    mem_addr_o <= mem_addr_1_data_reg;

    mem_req_1_vld_in_assign_proc : process(ap_sig_cseq_ST_st10_fsm_9, ap_sig_cseq_ST_st18_fsm_17, grp_lcddrv_read_mem_fu_206_mem_req_ap_vld)
    begin
        if (((ap_const_logic_1 = ap_sig_cseq_ST_st10_fsm_9) or (ap_const_logic_1 = ap_sig_cseq_ST_st18_fsm_17))) then 
            mem_req_1_vld_in <= grp_lcddrv_read_mem_fu_206_mem_req_ap_vld;
        else 
            mem_req_1_vld_in <= ap_const_logic_0;
        end if; 
    end process;

    mem_req_o <= mem_req_1_data_reg;
    pos_2_fu_242_p2 <= std_logic_vector(unsigned(pos_reg_144) + unsigned(ap_const_lv5_1));
    pos_3_fu_263_p2 <= std_logic_vector(unsigned(ap_const_lv6_1) + unsigned(pos_1_reg_156));

    rs_1_data_in_assign_proc : process(grp_lcddrv_init_lcd_fu_167_rs, grp_lcddrv_init_lcd_fu_167_rs_ap_vld, grp_lcddrv_lcd_send_cmd_fu_179_rs, grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld, ap_sig_cseq_ST_st8_fsm_7, ap_sig_cseq_ST_st13_fsm_12, ap_sig_cseq_ST_st16_fsm_15, ap_sig_cseq_ST_st21_fsm_20, ap_sig_cseq_ST_st4_fsm_3, ap_sig_cseq_ST_st6_fsm_5, ap_sig_cseq_ST_st14_fsm_13, ap_sig_cseq_ST_st11_fsm_10, ap_sig_cseq_ST_st19_fsm_18)
    begin
        if ((((ap_const_logic_1 = ap_sig_cseq_ST_st6_fsm_5) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st14_fsm_13) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st11_fsm_10) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st19_fsm_18) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld)) or ((ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20) and (ap_const_logic_1 = grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld)))) then 
            rs_1_data_in <= grp_lcddrv_lcd_send_cmd_fu_179_rs;
        elsif (((ap_const_logic_1 = ap_sig_cseq_ST_st4_fsm_3) and (ap_const_logic_1 = grp_lcddrv_init_lcd_fu_167_rs_ap_vld))) then 
            rs_1_data_in <= grp_lcddrv_init_lcd_fu_167_rs;
        else 
            rs_1_data_in <= "X";
        end if; 
    end process;


    rs_1_vld_in_assign_proc : process(grp_lcddrv_init_lcd_fu_167_rs_ap_vld, grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld, ap_sig_cseq_ST_st8_fsm_7, ap_sig_cseq_ST_st13_fsm_12, ap_sig_cseq_ST_st16_fsm_15, ap_sig_cseq_ST_st21_fsm_20, ap_sig_cseq_ST_st4_fsm_3, ap_sig_cseq_ST_st6_fsm_5, ap_sig_cseq_ST_st14_fsm_13, ap_sig_cseq_ST_st11_fsm_10, ap_sig_cseq_ST_st19_fsm_18)
    begin
        if (((ap_const_logic_1 = ap_sig_cseq_ST_st8_fsm_7) or (ap_const_logic_1 = ap_sig_cseq_ST_st13_fsm_12) or (ap_const_logic_1 = ap_sig_cseq_ST_st16_fsm_15) or (ap_const_logic_1 = ap_sig_cseq_ST_st21_fsm_20) or (ap_const_logic_1 = ap_sig_cseq_ST_st6_fsm_5) or (ap_const_logic_1 = ap_sig_cseq_ST_st14_fsm_13) or (ap_const_logic_1 = ap_sig_cseq_ST_st11_fsm_10) or (ap_const_logic_1 = ap_sig_cseq_ST_st19_fsm_18))) then 
            rs_1_vld_in <= grp_lcddrv_lcd_send_cmd_fu_179_rs_ap_vld;
        elsif ((ap_const_logic_1 = ap_sig_cseq_ST_st4_fsm_3)) then 
            rs_1_vld_in <= grp_lcddrv_init_lcd_fu_167_rs_ap_vld;
        else 
            rs_1_vld_in <= ap_const_logic_0;
        end if; 
    end process;

    rs_o <= rs_1_data_reg;
    tmp_2_fu_248_p1 <= grp_lcddrv_read_mem_fu_206_ap_return(4 - 1 downto 0);
    tmp_3_fu_258_p1 <= pos_1_reg_156(5 - 1 downto 0);
    tmp_4_fu_269_p1 <= grp_lcddrv_read_mem_fu_206_ap_return(4 - 1 downto 0);
end behav;
