Device Usage Page (usage_statistics_webtalk.html)

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software_version_and_target_device
betaFALSE build_version1756540
date_generatedSat Apr 29 17:43:06 2017 os_platformWIN64
product_versionVivado v2016.4 (64-bit) project_idda3947ffc8824b9fa5eaeab9f83961ef
project_iteration33 random_id670d691206785d3d81b20868dd8a457f
registration_id670d691206785d3d81b20868dd8a457f route_designTRUE
target_devicexc7a35ti target_familyartix7
target_packagecsg324 target_speed-1L
tool_flowVivado

user_environment
cpu_nameIntel(R) Core(TM) i7-6950X CPU @ 3.00GHz cpu_speed3000 MHz
os_nameMicrosoft Windows 8 or later , 64-bit os_releasemajor release (build 9200)
system_ram137.000 GB total_processors1

vivado_usage
java_command_handlers
addsources=14 autoconnecttarget=1 editdelete=4 launchprogramfpga=30
newproject=2 openhardwaremanager=30 openrecenttarget=3 programdevice=31
projectsettingscmdhandler=3 runbitgen=45 runimplementation=1 showview=13
viewtaskprojectmanager=18
other_data
guimode=1
project_data
constraintsetcount=1 core_container=false currentimplrun=impl_1 currentsynthesisrun=synth_1
default_library=xil_defaultlib designmode=RTL export_simulation_activehdl=0 export_simulation_ies=0
export_simulation_modelsim=0 export_simulation_questa=0 export_simulation_riviera=0 export_simulation_vcs=0
export_simulation_xsim=0 implstrategy=Vivado Implementation Defaults launch_simulation_activehdl=0 launch_simulation_ies=0
launch_simulation_modelsim=0 launch_simulation_questa=0 launch_simulation_riviera=0 launch_simulation_vcs=0
launch_simulation_xsim=0 simulator_language=Mixed srcsetcount=70 synthesisstrategy=Vivado Synthesis Defaults
target_language=Verilog target_simulator=XSim totalimplruns=1 totalsynthesisruns=1

unisim_transformation
post_unisim_transformation
bufg=1 carry4=836 dsp48e1=53 fdre=8002
fdse=26 gnd=135 ibuf=12 lut1=1118
lut2=1939 lut3=1901 lut4=891 lut5=1422
lut6=2401 muxf7=101 muxf8=36 obuf=25
obuft=2 ramb18e1=1 rams32=1 srlc32e=6
vcc=137
pre_unisim_transformation
bufg=1 carry4=836 dsp48e1=53 fdre=8002
fdse=26 gnd=135 ibuf=10 iobuf=2
lut1=1118 lut2=1939 lut3=1901 lut4=891
lut5=1422 lut6=2401 muxf7=101 muxf8=36
obuf=25 ram32x1s=1 ramb18e1=1 srlc32e=6
vcc=137

power_opt_design
command_line_options_spo
-cell_types=default::all -clocks=default::[not_specified] -exclude_cells=default::[not_specified] -include_cells=default::[not_specified]
usage
bram_ports_augmented=0 bram_ports_newly_gated=0 bram_ports_total=2 flow_state=default
slice_registers_augmented=0 slice_registers_newly_gated=0 slice_registers_total=7960 srls_augmented=0
srls_newly_gated=0 srls_total=6

ip_statistics
hls_ip_2016_4/10
core_container=NA hls_input_arch=others hls_input_clock=8.000000 hls_input_fixed=0
hls_input_float=0 hls_input_part=xc7a35ticsg324-1l hls_input_type=c hls_syn_clock=6.411000
hls_syn_dsp=0 hls_syn_ff=3505 hls_syn_lat=-1 hls_syn_lut=6284
hls_syn_mem=1 hls_syn_tpt=none iptotal=1
hls_ip_2016_4/1
core_container=NA hls_input_arch=others hls_input_clock=8.000000 hls_input_fixed=0
hls_input_float=0 hls_input_part=xc7a35ticsg324-1l hls_input_type=c hls_syn_clock=7.180000
hls_syn_dsp=4 hls_syn_ff=533 hls_syn_lat=-1 hls_syn_lut=899
hls_syn_mem=0 hls_syn_tpt=none iptotal=1
hls_ip_2016_4/2
core_container=NA hls_input_arch=others hls_input_clock=8.000000 hls_input_fixed=0
hls_input_float=0 hls_input_part=xc7a35ticsg324-1l hls_input_type=c hls_syn_clock=9.570000
hls_syn_dsp=19 hls_syn_ff=2749 hls_syn_lat=-1 hls_syn_lut=3382
hls_syn_mem=0 hls_syn_tpt=none iptotal=1
hls_ip_2016_4/3
core_container=NA hls_input_arch=others hls_input_clock=8.000000 hls_input_fixed=0
hls_input_float=0 hls_input_part=xc7a35ticsg324-1l hls_input_type=c hls_syn_clock=6.680000
hls_syn_dsp=8 hls_syn_ff=207 hls_syn_lat=-1 hls_syn_lut=320
hls_syn_mem=0 hls_syn_tpt=none iptotal=1
hls_ip_2016_4/4
core_container=NA hls_input_arch=others hls_input_clock=8.000000 hls_input_fixed=0
hls_input_float=0 hls_input_part=xc7a35ticsg324-1l hls_input_type=c hls_syn_clock=7.180000
hls_syn_dsp=23 hls_syn_ff=2163 hls_syn_lat=-1 hls_syn_lut=2798
hls_syn_mem=0 hls_syn_tpt=none iptotal=1
hls_ip_2016_4/5
core_container=NA hls_input_arch=others hls_input_clock=8.000000 hls_input_fixed=0
hls_input_float=0 hls_input_part=xc7a35ticsg324-1l hls_input_type=c hls_syn_clock=6.687880
hls_syn_dsp=4 hls_syn_ff=336 hls_syn_lat=-1 hls_syn_lut=446
hls_syn_mem=0 hls_syn_tpt=none iptotal=1
hls_ip_2016_4/6
core_container=NA hls_input_arch=others hls_input_clock=8.000000 hls_input_fixed=0
hls_input_float=0 hls_input_part=xc7a35ticsg324-1l hls_input_type=c hls_syn_clock=7.491200
hls_syn_dsp=0 hls_syn_ff=243 hls_syn_lat=-1 hls_syn_lut=645
hls_syn_mem=0 hls_syn_tpt=none iptotal=1
hls_ip_2016_4/7
core_container=NA hls_input_arch=others hls_input_clock=8.000000 hls_input_fixed=0
hls_input_float=0 hls_input_part=xc7a35ticsg324-1l hls_input_type=c hls_syn_clock=4.472400
hls_syn_dsp=0 hls_syn_ff=374 hls_syn_lat=-1 hls_syn_lut=402
hls_syn_mem=0 hls_syn_tpt=none iptotal=1
hls_ip_2016_4/8
core_container=NA hls_input_arch=others hls_input_clock=8.000000 hls_input_fixed=0
hls_input_float=0 hls_input_part=xc7a35ticsg324-1l hls_input_type=c hls_syn_clock=5.377000
hls_syn_dsp=0 hls_syn_ff=164 hls_syn_lat=-1 hls_syn_lut=263
hls_syn_mem=0 hls_syn_tpt=none iptotal=1
hls_ip_2016_4/9
core_container=NA hls_input_arch=others hls_input_clock=8.000000 hls_input_fixed=0
hls_input_float=0 hls_input_part=xc7a35ticsg324-1l hls_input_type=c hls_syn_clock=4.847600
hls_syn_dsp=0 hls_syn_ff=1314 hls_syn_lat=-1 hls_syn_lut=690
hls_syn_mem=0 hls_syn_tpt=none iptotal=1

report_drc
command_line_options
-append=default::[not_specified] -checks=default::[not_specified] -fail_on=default::[not_specified] -force=default::[not_specified]
-format=default::[not_specified] -messages=default::[not_specified] -name=default::[not_specified] -return_string=default::[not_specified]
-ruledecks=default::[not_specified] -upgrade_cw=default::[not_specified]
results
cfgbvs-1=1 dpip-1=2 dpop-1=14 dpop-2=3

report_methodology
command_line_options
-append=default::[not_specified] -checks=default::[not_specified] -fail_on=default::[not_specified] -force=default::[not_specified]
-format=default::[not_specified] -messages=default::[not_specified] -name=default::[not_specified] -return_string=default::[not_specified]
results
synth-11=3 synth-6=1 synth-9=4 timing-18=24

report_power
command_line_options
-advisory=default::[not_specified] -append=default::[not_specified] -file=[specified] -format=default::text
-hier=default::power -l=default::[not_specified] -name=default::[not_specified] -no_propagation=default::[not_specified]
-return_string=default::[not_specified] -rpx=[specified] -verbose=default::[not_specified] -vid=default::[not_specified]
-xpe=default::[not_specified]
usage
airflow=250 (LFM) ambient_temp=25.0 (C) bi-dir_toggle=12.500000 bidir_output_enable=1.000000
board_layers=12to15 (12 to 15 Layers) board_selection=medium (10"x10") bram=0.000028 clocks=0.023657
confidence_level_clock_activity=High confidence_level_design_state=High confidence_level_device_models=Medium confidence_level_internal_activity=Medium
confidence_level_io_activity=Low confidence_level_overall=Low customer=TBD customer_class=TBD
devstatic=0.061962 die=xc7a35ticsg324-1L dsp=0.025164 dsp_output_toggle=12.500000
dynamic=0.087031 effective_thetaja=4.8 enable_probability=0.990000 family=artix7
ff_toggle=12.500000 flow_state=routed heatsink=medium (Medium Profile) i/o=0.002528
input_toggle=12.500000 junction_temp=25.7 (C) logic=0.017334 mgtavcc_dynamic_current=0.000000
mgtavcc_static_current=0.000000 mgtavcc_total_current=0.000000 mgtavcc_voltage=1.000000 mgtavtt_dynamic_current=0.000000
mgtavtt_static_current=0.000000 mgtavtt_total_current=0.000000 mgtavtt_voltage=1.200000 netlist_net_matched=NA
off-chip_power=0.000000 on-chip_power=0.148993 output_enable=1.000000 output_load=5.000000
output_toggle=12.500000 package=csg324 pct_clock_constrained=7.000000 pct_inputs_defined=8
platform=nt64 process=typical ram_enable=50.000000 ram_write=50.000000
read_saif=False set/reset_probability=0.000000 signal_rate=False signals=0.018320
simulation_file=None speedgrade=-1L static_prob=False temp_grade=industrial
thetajb=6.8 (C/W) thetasa=4.6 (C/W) toggle_rate=False user_board_temp=25.0 (C)
user_effective_thetaja=4.8 user_junc_temp=25.7 (C) user_thetajb=6.8 (C/W) user_thetasa=4.6 (C/W)
vccadc_dynamic_current=0.000000 vccadc_static_current=0.018000 vccadc_total_current=0.018000 vccadc_voltage=1.800000
vccaux_dynamic_current=0.000088 vccaux_io_dynamic_current=0.000000 vccaux_io_static_current=0.000000 vccaux_io_total_current=0.000000
vccaux_io_voltage=1.800000 vccaux_static_current=0.011362 vccaux_total_current=0.011451 vccaux_voltage=1.800000
vccbram_dynamic_current=0.000003 vccbram_static_current=0.000107 vccbram_total_current=0.000110 vccbram_voltage=0.950000
vccint_dynamic_current=0.089072 vccint_static_current=0.006009 vccint_total_current=0.095080 vccint_voltage=0.950000
vcco12_dynamic_current=0.000000 vcco12_static_current=0.000000 vcco12_total_current=0.000000 vcco12_voltage=1.200000
vcco135_dynamic_current=0.000000 vcco135_static_current=0.000000 vcco135_total_current=0.000000 vcco135_voltage=1.350000
vcco15_dynamic_current=0.000000 vcco15_static_current=0.000000 vcco15_total_current=0.000000 vcco15_voltage=1.500000
vcco18_dynamic_current=0.000000 vcco18_static_current=0.000000 vcco18_total_current=0.000000 vcco18_voltage=1.800000
vcco25_dynamic_current=0.000000 vcco25_static_current=0.000000 vcco25_total_current=0.000000 vcco25_voltage=2.500000
vcco33_dynamic_current=0.000682 vcco33_static_current=0.001000 vcco33_total_current=0.001682 vcco33_voltage=3.300000
version=2016.4

report_utilization
clocking
bufgctrl_available=32 bufgctrl_fixed=0 bufgctrl_used=1 bufgctrl_util_percentage=3.13
bufhce_available=72 bufhce_fixed=0 bufhce_used=0 bufhce_util_percentage=0.00
bufio_available=20 bufio_fixed=0 bufio_used=0 bufio_util_percentage=0.00
bufmrce_available=10 bufmrce_fixed=0 bufmrce_used=0 bufmrce_util_percentage=0.00
bufr_available=20 bufr_fixed=0 bufr_used=0 bufr_util_percentage=0.00
mmcme2_adv_available=5 mmcme2_adv_fixed=0 mmcme2_adv_used=0 mmcme2_adv_util_percentage=0.00
plle2_adv_available=5 plle2_adv_fixed=0 plle2_adv_used=0 plle2_adv_util_percentage=0.00
dsp
dsp48e1_only_used=53 dsps_available=90 dsps_fixed=0 dsps_used=53
dsps_util_percentage=58.89
io_standard
blvds_25=0 diff_hstl_i=0 diff_hstl_i_18=0 diff_hstl_ii=0
diff_hstl_ii_18=0 diff_hsul_12=0 diff_mobile_ddr=0 diff_sstl135=0
diff_sstl135_r=0 diff_sstl15=0 diff_sstl15_r=0 diff_sstl18_i=0
diff_sstl18_ii=0 hstl_i=0 hstl_i_18=0 hstl_ii=0
hstl_ii_18=0 hsul_12=0 lvcmos12=0 lvcmos15=0
lvcmos18=0 lvcmos25=0 lvcmos33=1 lvds_25=0
lvttl=0 mini_lvds_25=0 mobile_ddr=0 pci33_3=0
ppds_25=0 rsds_25=0 sstl135=0 sstl135_r=0
sstl15=0 sstl15_r=0 sstl18_i=0 sstl18_ii=0
tmds_33=0
memory
block_ram_tile_available=50 block_ram_tile_fixed=0 block_ram_tile_used=0.5 block_ram_tile_util_percentage=1.00
ramb18_available=100 ramb18_fixed=0 ramb18_used=1 ramb18_util_percentage=1.00
ramb18e1_only_used=1 ramb36_fifo_available=50 ramb36_fifo_fixed=0 ramb36_fifo_used=0
ramb36_fifo_util_percentage=0.00
primitives
bufg_functional_category=Clock bufg_used=1 carry4_functional_category=CarryLogic carry4_used=836
dsp48e1_functional_category=Block Arithmetic dsp48e1_used=53 fdre_functional_category=Flop & Latch fdre_used=7934
fdse_functional_category=Flop & Latch fdse_used=26 ibuf_functional_category=IO ibuf_used=12
lut1_functional_category=LUT lut1_used=98 lut2_functional_category=LUT lut2_used=1939
lut3_functional_category=LUT lut3_used=1901 lut4_functional_category=LUT lut4_used=891
lut5_functional_category=LUT lut5_used=1422 lut6_functional_category=LUT lut6_used=2401
muxf7_functional_category=MuxFx muxf7_used=101 muxf8_functional_category=MuxFx muxf8_used=36
obuf_functional_category=IO obuf_used=25 obuft_functional_category=IO obuft_used=2
ramb18e1_functional_category=Block Memory ramb18e1_used=1 rams32_functional_category=Distributed Memory rams32_used=1
srlc32e_functional_category=Distributed Memory srlc32e_used=6
slice_logic
f7_muxes_available=16300 f7_muxes_fixed=0 f7_muxes_used=101 f7_muxes_util_percentage=0.62
f8_muxes_available=8150 f8_muxes_fixed=0 f8_muxes_used=36 f8_muxes_util_percentage=0.44
lut_as_distributed_ram_fixed=0 lut_as_distributed_ram_used=1 lut_as_logic_available=20800 lut_as_logic_fixed=0
lut_as_logic_used=7380 lut_as_logic_util_percentage=35.48 lut_as_memory_available=9600 lut_as_memory_fixed=0
lut_as_memory_used=7 lut_as_memory_util_percentage=0.07 lut_as_shift_register_fixed=0 lut_as_shift_register_used=6
register_as_flip_flop_available=41600 register_as_flip_flop_fixed=0 register_as_flip_flop_used=7960 register_as_flip_flop_util_percentage=19.13
register_as_latch_available=41600 register_as_latch_fixed=0 register_as_latch_used=0 register_as_latch_util_percentage=0.00
slice_luts_available=20800 slice_luts_fixed=0 slice_luts_used=7387 slice_luts_util_percentage=35.51
slice_registers_available=41600 slice_registers_fixed=0 slice_registers_used=7960 slice_registers_util_percentage=19.13
fully_used_lut_ff_pairs_fixed=19.13 fully_used_lut_ff_pairs_used=280 lut_as_distributed_ram_fixed=0 lut_as_distributed_ram_used=1
lut_as_logic_available=20800 lut_as_logic_fixed=0 lut_as_logic_used=7380 lut_as_logic_util_percentage=35.48
lut_as_memory_available=9600 lut_as_memory_fixed=0 lut_as_memory_used=7 lut_as_memory_util_percentage=0.07
lut_as_shift_register_fixed=0 lut_as_shift_register_used=6 lut_ff_pairs_with_one_unused_flip_flop_fixed=6 lut_ff_pairs_with_one_unused_flip_flop_used=3163
lut_ff_pairs_with_one_unused_lut_output_fixed=3163 lut_ff_pairs_with_one_unused_lut_output_used=2956 lut_flip_flop_pairs_available=20800 lut_flip_flop_pairs_fixed=0
lut_flip_flop_pairs_used=3515 lut_flip_flop_pairs_util_percentage=16.90 slice_available=8150 slice_fixed=0
slice_used=2809 slice_util_percentage=34.47 slicel_fixed=0 slicel_used=1912
slicem_fixed=0 slicem_used=897 unique_control_sets_used=341 using_o5_and_o6_fixed=341
using_o5_and_o6_used=0 using_o5_output_only_fixed=0 using_o5_output_only_used=0 using_o6_output_only_fixed=0
using_o6_output_only_used=6
specific_feature
bscane2_available=4 bscane2_fixed=0 bscane2_used=0 bscane2_util_percentage=0.00
capturee2_available=1 capturee2_fixed=0 capturee2_used=0 capturee2_util_percentage=0.00
dna_port_available=1 dna_port_fixed=0 dna_port_used=0 dna_port_util_percentage=0.00
efuse_usr_available=1 efuse_usr_fixed=0 efuse_usr_used=0 efuse_usr_util_percentage=0.00
frame_ecce2_available=1 frame_ecce2_fixed=0 frame_ecce2_used=0 frame_ecce2_util_percentage=0.00
icape2_available=2 icape2_fixed=0 icape2_used=0 icape2_util_percentage=0.00
pcie_2_1_available=1 pcie_2_1_fixed=0 pcie_2_1_used=0 pcie_2_1_util_percentage=0.00
startupe2_available=1 startupe2_fixed=0 startupe2_used=0 startupe2_util_percentage=0.00
xadc_available=1 xadc_fixed=0 xadc_used=0 xadc_util_percentage=0.00

router
usage
actual_expansions=7426951 bogomips=0 bram18=1 bram36=0
bufg=0 bufr=0 congestion_level=0 ctrls=341
dsp=53 effort=2 estimated_expansions=11695830 ff=7960
global_clocks=1 high_fanout_nets=9 iob=37 lut=7660
movable_instances=18026 nets=22483 pins=121515 pll=0
router_runtime=0.000000 router_timing_driven=1 threads=2 timing_constraints_exist=1

synthesis
command_line_options
-assert=default::[not_specified] -bufg=default::12 -cascade_dsp=default::auto -constrset=default::[not_specified]
-control_set_opt_threshold=default::auto -directive=default::default -fanout_limit=default::10000 -flatten_hierarchy=default::rebuilt
-fsm_extraction=default::auto -gated_clock_conversion=default::off -generic=default::[not_specified] -include_dirs=default::[not_specified]
-keep_equivalent_registers=default::[not_specified] -max_bram=default::-1 -max_bram_cascade_height=default::-1 -max_dsp=default::-1
-max_uram=default::-1 -max_uram_cascade_height=default::-1 -mode=default::default -name=default::[not_specified]
-no_lc=default::[not_specified] -no_srlextract=default::[not_specified] -no_timing_driven=default::[not_specified] -part=xc7a35ticsg324-1L
-resource_sharing=default::auto -retiming=default::[not_specified] -rtl=default::[not_specified] -rtl_skip_constraints=default::[not_specified]
-rtl_skip_ip=default::[not_specified] -seu_protect=default::none -shreg_min_size=default::3 -top=sns_top
-verilog_define=default::[not_specified]
usage
elapsed=00:02:37s hls_ip=10 memory_gain=836.309MB memory_peak=1046.641MB