PnR Messages

Report Title Gowin PnR Report
Design File C:\Gowin\Workspace210723\leg4\impl\gwsynthesis\leg4.vg
Physical Constraints File C:\Gowin\Workspace210723\leg4\src\leg4.cst
Timing Constraints File ---
GOWIN Version V1.9.7.03Beta
Part Number GW1N-UV4LQ144C6/I5
Device GW1N-4B
Created Time Sat Jul 24 09:55:56 2021
Legal Announcement Copyright (C)2014-2021 Gowin Semiconductor Corporation. All rights reserved.

PnR Details

Place & Route Process Running placement: Placement Phase 0: CPU time = 0h 0m 0.019s, Elapsed time = 0h 0m 0.02s Placement Phase 1: CPU time = 0h 0m 0.081s, Elapsed time = 0h 0m 0.081s Placement Phase 2: CPU time = 0h 0m 0.009s, Elapsed time = 0h 0m 0.009s Placement Phase 3: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s Total Placement: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s Running routing: Routing Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s Routing Phase 1: CPU time = 0h 0m 0.056s, Elapsed time = 0h 0m 0.056s Routing Phase 2: CPU time = 0h 0m 0.15s, Elapsed time = 0h 0m 0.151s Total Routing: CPU time = 0h 0m 0.206s, Elapsed time = 0h 0m 0.207s Generate output files: CPU time = 0h 0m 0.689s, Elapsed time = 0h 0m 0.688s
Total Time and Memory Usage CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s, Peak memory usage = 140MB

Resource

Resource Usage Summary:

Resource Usage Utilization
Logic 245/4608 5%
    --LUT,ALU,ROM16 245(228 LUT, 17 ALU, 0 ROM16) -
    --SSRAM(RAM16) 0 -
Register 108/3756 2%
    --Logic Register as Latch 0/3456 0%
    --Logic Register as FF 107/3456 3%
    --I/O Register as Latch 0/300 0%
    --I/O Register as FF 1/300 1%
CLS 150/2304 6%
I/O Port 30 -
I/O Buf 26 -
    --Input Buf 5 -
    --Output Buf 21 -
    --Inout Buf 0 -
IOLOGIC 0 0%
BSRAM 0 0%
DSP 00%
PLL 0/2 0%
DCS 0/4 0%
DQCE 0/12 0%
OSC 0/1 0%
User Flash 0/1 0%
CLKDIV 0/6 0%
DLLDLY 0/6 0%
DHCEN 0/12 0%

I/O Bank Usage Summary:

I/O Bank Usage
bank 0 7/33(21%)
bank 1 0/24(0%)
bank 2 4/38(10%)
bank 3 15/25(60%)

Global Clock Usage Summary:

Global Clock Usage
PRIMARY 3/8(37%)
SECONDARY 2/8(25%)
GCLK_PIN 3/6(50%)
PLL 0/2(0%)
CLKDIV 0/6(0%)
DLLDLY 0/6(0%)

Global Clock Signals:

Signal Global Clock Location
leg4_clk PRIMARY LEFT
clk400Hz PRIMARY RIGHT
clk10KHz PRIMARY LEFT
clk_d SECONDARY -
nrst_d SECONDARY -

Pinout by Port Name:

Port Name Diff Pair Loc./Bank Constraint Dir. Site IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Slew Rate Vref Single Resistor Diff Resistor BankVccio
clk 4/3 Y in IOL3[A] LVCMOS18 NA NONE NA NONE NA NA NA OFF NA 1.8
nrst 58/2 Y in IOB20[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
clk_sel[0] 76/2 Y in IOB36[B] LVCMOS18 NA NONE NA NONE NA NA NA NA NA 1.2
clk_sel[1] 75/2 Y in IOB34[A] LVCMOS18 NA NONE NA NONE NA NA NA NA NA 1.2
clk_btn 65/2 Y in IOB24[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
in[0] 83/1 Y in IOR11[B] LVCMOS18 NA NONE NA NONE NA NA NA OFF NA 1.2
in[1] 82/1 Y in IOR15[A] LVCMOS18 NA NONE NA NONE NA NA NA OFF NA 1.2
in[2] 81/1 Y in IOR15[B] LVCMOS18 NA NONE NA NONE NA NA NA OFF NA 1.2
in[3] 80/1 Y in IOR17[A] LVCMOS18 NA NONE NA NONE NA NA NA OFF NA 1.2
bz 118/0 Y out IOT26[B] LVCMOS18 8 NONE NA NA OFF FAST NA NA NA 1.8
led[0] 30/3 Y out IOL15[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
led[1] 29/3 Y out IOL15[A] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
led[2] 28/3 Y out IOL13[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
led[3] 27/3 Y out IOL13[A] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
led[4] 26/3 Y out IOL11[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
led[5] 25/3 Y out IOL11[A] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
led[6] 24/3 Y out IOL10[J] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
led[7] 23/3 Y out IOL10[I] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
seg[0] 138/0 Y out IOT7[A] LVCMOS18 8 NONE NA NA OFF FAST NA NA NA 1.8
seg[1] 142/0 Y out IOT4[A] LVCMOS18 8 NONE NA NA OFF FAST NA NA NA 1.8
seg[2] 9/3 Y out IOL6[A] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
seg[3] 11/3 Y out IOL9[A] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
seg[4] 12/3 Y out IOL9[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
seg[5] 139/0 Y out IOT6[B] LVCMOS18 8 NONE NA NA OFF FAST NA NA NA 1.8
seg[6] 8/3 Y out IOL4[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
seg[7] 10/3 Y out IOL6[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
seg_dig[0] 137/0 Y out IOT7[B] LVCMOS18 8 UP NA NA OFF FAST NA NA NA 1.8
seg_dig[1] 140/0 Y out IOT6[A] LVCMOS18 8 UP NA NA OFF FAST NA NA NA 1.8
seg_dig[2] 141/0 Y out IOT4[B] LVCMOS18 8 UP NA NA OFF FAST NA NA NA 1.8
seg_dig[3] 7/3 Y out IOL4[A] LVCMOS18 8 UP NA NA OFF FAST NA OFF NA 1.8

All Package Pins:

Loc./Bank Signal Dir. Site IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Slew Rate Vref Single Resistor Diff Resistor Bank Vccio
144/0 - in IOT2[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
143/0 - in IOT3[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
142/0 seg[1] out IOT4[A] LVCMOS18 8 NONE NA NA OFF FAST NA NA NA 1.8
141/0 seg_dig[2] out IOT4[B] LVCMOS18 8 UP NA NA OFF FAST NA NA NA 1.8
140/0 seg_dig[1] out IOT6[A] LVCMOS18 8 UP NA NA OFF FAST NA NA NA 1.8
139/0 seg[5] out IOT6[B] LVCMOS18 8 NONE NA NA OFF FAST NA NA NA 1.8
138/0 seg[0] out IOT7[A] LVCMOS18 8 NONE NA NA OFF FAST NA NA NA 1.8
137/0 seg_dig[0] out IOT7[B] LVCMOS18 8 UP NA NA OFF FAST NA NA NA 1.8
136/0 - in IOT9[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
135/0 - in IOT9[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
134/0 - in IOT12[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
133/0 - in IOT12[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
132/0 - in IOT14[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
131/0 - in IOT14[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
130/0 - in IOT16[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
129/0 - in IOT16[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
128/0 - in IOT17[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
126/0 - in IOT18[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
124/0 - in IOT20[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
123/0 - in IOT22[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
122/0 - in IOT22[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
121/0 - in IOT24[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
120/0 - in IOT24[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
119/0 - in IOT26[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
118/0 bz out IOT26[B] LVCMOS18 8 NONE NA NA OFF FAST NA NA NA 1.8
117/0 - in IOT30[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
116/0 - in IOT30[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
115/0 - in IOT33[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
114/0 - in IOT33[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
113/0 - in IOT35[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
112/0 - in IOT35[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
111/0 - in IOT37[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
110/0 - in IOT37[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
32/2 - in IOB4[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
34/2 - in IOB5[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
38/2 - in IOB6[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
39/2 - in IOB6[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
40/2 - in IOB7[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
41/2 - in IOB7[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
42/2 - in IOB8[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
43/2 - in IOB8[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
44/2 - in IOB10[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
45/2 - in IOB10[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
46/2 - in IOB11[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
47/2 - in IOB11[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
48/2 - in IOB12[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
49/2 - in IOB12[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
50/2 - in IOB14[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
51/2 - in IOB14[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
52/2 - in IOB16[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
54/2 - in IOB16[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
56/2 - in IOB19[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
57/2 - in IOB19[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
58/2 nrst in IOB20[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
59/2 - in IOB20[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
60/2 - in IOB21[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
61/2 - in IOB21[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
62/2 - in IOB22[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
63/2 - in IOB22[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
64/2 - in IOB24[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
65/2 clk_btn in IOB24[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
66/2 - in IOB26[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
67/2 - in IOB26[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
68/2 - in IOB28[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
69/2 - in IOB28[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
70/2 - in IOB30[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
71/2 - in IOB30[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
75/2 clk_sel[1] in IOB34[A] LVCMOS18 NA NONE NA NONE NA NA NA NA NA 1.2
72/2 - in IOB34[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
78/2 - in IOB36[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
76/2 clk_sel[0] in IOB36[B] LVCMOS18 NA NONE NA NONE NA NA NA NA NA 1.2
3/3 - in IOL2[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
4/3 clk in IOL3[A] LVCMOS18 NA NONE NA NONE NA NA NA OFF NA 1.8
6/3 - in IOL3[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
7/3 seg_dig[3] out IOL4[A] LVCMOS18 8 UP NA NA OFF FAST NA OFF NA 1.8
8/3 seg[6] out IOL4[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
9/3 seg[2] out IOL6[A] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
10/3 seg[7] out IOL6[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
11/3 seg[3] out IOL9[A] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
12/3 seg[4] out IOL9[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
13/3 - in IOL10[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
14/3 - in IOL10[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
15/3 - in IOL10[C] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
16/3 - in IOL10[D] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
18/3 - out IOL10[E] LVCMOS18 8 UP NA NA OFF FAST NA NA NA 1.8
20/3 - in IOL10[F] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
21/3 - in IOL10[G] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
22/3 - in IOL10[H] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.8
23/3 led[7] out IOL10[I] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
24/3 led[6] out IOL10[J] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
25/3 led[5] out IOL11[A] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
26/3 led[4] out IOL11[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
27/3 led[3] out IOL13[A] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
28/3 led[2] out IOL13[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
29/3 led[1] out IOL15[A] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
30/3 led[0] out IOL15[B] LVCMOS18 8 NONE NA NA OFF FAST NA OFF NA 1.8
106/1 - in IOR3[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
104/1 - in IOR3[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
102/1 - in IOR4[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
101/1 - in IOR4[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
100/1 - in IOR6[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
99/1 - in IOR6[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
98/1 - in IOR9[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
97/1 - in IOR9[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
96/1 - in IOR10[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
95/1 - in IOR10[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
94/1 - in IOR10[C] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
93/1 - in IOR10[D] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
92/1 - in IOR10[E] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
90/1 - in IOR10[F] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
88/1 - in IOR10[G] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
87/1 - in IOR10[H] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
86/1 - in IOR10[I] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
85/1 - in IOR10[J] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
84/1 - in IOR11[A] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2
83/1 in[0] in IOR11[B] LVCMOS18 NA NONE NA NONE NA NA NA OFF NA 1.2
82/1 in[1] in IOR15[A] LVCMOS18 NA NONE NA NONE NA NA NA OFF NA 1.2
81/1 in[2] in IOR15[B] LVCMOS18 NA NONE NA NONE NA NA NA OFF NA 1.2
80/1 in[3] in IOR17[A] LVCMOS18 NA NONE NA NONE NA NA NA OFF NA 1.2
79/1 - in IOR17[B] LVCMOS18 NA UP NA NONE NA NA NA NA NA 1.2