| Report Title |
Gowin Power Analysis Report |
| Design File |
C:\Gowin\Workspace\uart\impl\gwsynthesis\uart.vg |
| Physical Constraints File |
C:\Gowin\Workspace\uart\src\uart.cst |
| Timing Constraints File |
--- |
| GOWIN Version |
V1.9.7.06Beta |
| Part Number |
GW1N-UV4LQ144C6/I5 |
| Device |
GW1N-4B |
| Created Time |
Sat Jun 05 15:20:16 2021
|
| Legal Announcement |
Copyright (C)2014-2021 Gowin Semiconductor Corporation. All rights reserved. |
| Total Power (mW) |
40.458 |
| Quiescent Power (mW) |
22.050 |
| Dynamic Power (mW) |
18.408 |
| Junction Temperature |
25.409 |
| Theta JA |
10.100 |
| Max Allowed Ambient Temperature |
84.591 |
| Default IO Toggle Rate |
0.125 |
Default Remain Toggle Rate |
0.125 |
| Use Vectorless Estimation |
false |
| Filter Glitches |
false |
| Related Vcd File |
|
| Related Saif File |
|
| Use Custom Theta JA |
false |
| Air Flow |
LFM_0 |
| Heat Sink |
None |
| Use Custom Theta SA |
false |
| Board Thermal Model |
None |
| Use Custom Theta JB |
false |
| Ambient Temperature |
25.000
|
| Voltage Source |
Voltage |
Dynamic Current(mA) |
Quiescent Current(mA) |
Power(mW) |
| VCC |
2.500 |
6.766 |
8.400 |
37.915 |
| VCCX |
2.500 |
0.360 |
0.248 |
1.520 |
| VCCO12 |
1.200 |
0.088 |
0.026 |
0.136 |
| VCCO18 |
1.800 |
0.271 |
0.222 |
0.887 |
| Block Type |
Total Power(mW) |
Static Power(mW) |
Average Toggle Rate(millions of transitions/sec) |
| Logic |
2.441 |
NA |
20.362 |
| IO |
4.064
| 1.670
| 12.879
|
| Hierarchy Entity |
Total Power(mW) |
Block Dynamic Power(mW) |
Routing Dynamic Power(mW) |
| test_uart |
15.998 |
2.441(2.441) |
13.557(13.297) |
| test_uart/clkdiv_1/ |
0.581 |
0.123(0.000) |
0.459(0.000) |
| test_uart/clkdiv_2/ |
0.442 |
0.103(0.000) |
0.339(0.000) |
| test_uart/debounce_1/ |
6.567 |
0.790(0.773) |
5.776(5.639) |
| test_uart/debounce_1/clkdiv_1/ |
6.412 |
0.773(0.000) |
5.639(0.000) |
| test_uart/mux7seg_1/ |
3.345 |
0.863(0.684) |
2.482(1.812) |
| test_uart/mux7seg_1/i4/ |
2.496 |
0.684(0.000) |
1.812(0.000) |
| test_uart/rx_1/ |
2.729 |
0.305(0.000) |
2.424(0.000) |
| test_uart/toggle_1/ |
0.331 |
0.032(0.000) |
0.299(0.000) |
| test_uart/toggle_2/ |
0.280 |
0.032(0.000) |
0.248(0.000) |
| test_uart/tx_1/ |
1.463 |
0.193(0.000) |
1.269(0.000) |
| Clock Domain |
Clock Frequency(Mhz) |
Total Dynamic Power(mW) |
| clk9600hz |
100.000 |
1.767 |
| clk |
100.000 |
9.653 |
| debounce_1/clk400Hz |
100.000 |
0.458 |
| clk9600x2hz |
100.000 |
3.413 |
| NO CLOCK DOMAIN |
0.000 |
0.000 |
| mux7seg_1/clk10KHz |
100.000 |
0.723 |