StateSure

• Verify single state machine sequences

• Verify pairs of state machine sequences

• Verify paired state machine transitions

• Verify multiple state machine interactions

• StateSure supports Verilog, VHDL or both

• StateSure on UNIX or WindowsNT

Benefits Summary

前のｽﾗｲﾄﾞ

次のｽﾗｲﾄﾞ

最初のｽﾗｲﾄﾞに戻る

ｸﾞﾗﾌｨｯｸｽの表示