Efficient IP Development

• Capture the ALGORITHMS

  • HDLs are not very suited for algorithm design
    • no system level libraries available
    • no suitable performance analysis tools available
    • simulation speeds still to low
  • C/C++ is the de-facto standard for algorithm design
    • problem is that up to now no link with HDL design existed

• Which HDL?

  • VHDL vs Verilog

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