;*************************************************************************
;    Copyright 2004 Hata Akihiro 
;
;    　第5章　ＰＩＣアイデア集
;	5−１３　基準電圧を使用しＳＩＮ波形を発生させる 
;-------------------------------------------------------------------------
;プログラムの説明
;＜概要＞
;　基準電圧を４ビットＤ−ＡとしてＳＩＮ波を発生させるテスト・プログラム。
;
;＜動作＞
;　電源ＯＮでＳＩＮ波を連続出力する。
;
;-------------------------------------------------------------------------
; 2004/08/23	V1.00	初回リリース 
;
;
;
;
;-------------------------------------------------------------------------
;     CONFIGRATION FUSE
;	 WDT:Disable	OSC: XT     Code Protect:OFF    Power up timer:ON
;     OSCILLATOR
;        4MHz
;*************************************************************************
;
	LIST    P=PIC16F628A, R=DEC         ;Target Processor
	INCLUDE P16F628A.INC
;
	__CONFIG _XT_OSC & _WDT_OFF & _PWRTE_ON & _BODEN_OFF &  _CP_OFF & _LVP_OFF & _MCLRE_OFF & _DATA_CP_OFF
	__idlocs	H'0100'				;V1.00 2004/08/23
;	
;-------------------------------------------------------------------------
; DEFINE I/O Port
;-------------------------------------------------------------------------
; PortA
;	RA0		input
;	RA1		input				
;	RA2	D-A OUT	input(Vref out)
;	RA3		input
;	RA4		input
;	RA5		input
;
; PortB
;	RB0		input
;	RB1		input
;	RB2		input
;	RB3		input
;	RB4		input
;	RB5		input
;	RB6		input
;	RB7		input
;
;-------------------------------------------------------------------------
; Variables
;-------------------------------------------------------------------------
;
;
;
;-------------------------------------------------------------------------
; Registers
;-------------------------------------------------------------------------
;
ST_TEMP 		EQU	H'20'		; Status Reg. Temp. for Interupt
W_TEMP		EQU	H'21'		; Work Reg. Temp. for Interupt
INT_COUNTER	EQU	H'22'		; INTERUPT COUNTER

;-------------------------------------------------------------------------
; Program code
;-------------------------------------------------------------------------
;

		ORG	0
		GOTO	INITIALISE
		ORG	4
		GOTO	INTERUPT
;-------------------------------------------------------------------------
; Initialize
;-------------------------------------------------------------------------
INITIALISE
		BSF	STATUS,RP0
		MOVLW	H'FF'
		MOVWF	TRISA		;PORTA  ALL IN
		MOVLW	H'FF'
		MOVWF	TRISB		;PORTB  ALL IN
		BSF	PIE1,2		;CCP1 INT INABLE
		MOVLW	H'C7'
		MOVWF	VRCON
		BCF	STATUS,RP0

		MOVLW	H'07'
		MOVWF	CMCON		;ALL DIGITAL IN

		MOVLW	H'0B'
		MOVWF	CCP1CON
		CLRF	T1CON
		CLRF	CCPR1H
		MOVLW	H'71'
		MOVWF	CCPR1L
		CLRF	TMR1H
		CLRF	TMR1L						
		CLRF	INT_COUNTER

		BSF	T1CON,0		;TMR1 START
		MOVLW	H'C0'
		MOVWF	INTCON		;INT ENABLE
;*******************************************************
; MAIN PROGRAM
;*******************************************************

MAIN					; ENDLESS LOOP
		GOTO	MAIN

;*******************************************************
;  INTERUPT
;*******************************************************
INTERUPT
;****  save W register & status register
		MOVWF	W_TEMP		;save w reg
		SWAPF	STATUS,W		;status to wreg
		MOVWF	ST_TEMP		;save status

		MOVF	INT_COUNTER,W
		CALL	SIN_TIMEL
		MOVWF	CCPR1L		; CCP1L Reload
		MOVF	INT_COUNTER,W
		CALL	SIN_TIMEH
		MOVWF	CCPR1H		; CCP1H Reload
		MOVF	INT_COUNTER,W
		CALL	SIN_SPAN
		BSF	STATUS,RP0
		MOVWF	VRCON		; VRCON Reload
		BCF	STATUS,RP0
		INCF	INT_COUNTER,F
		MOVF	INT_COUNTER,W
		SUBLW	H'1C'
		BTFSC	STATUS,Z
		CLRF	INT_COUNTER
		BCF	PIR1,2		;CLEAR FLAG

;****  register restore and return
		SWAPF	ST_TEMP,W		;get saved status
		MOVWF	STATUS
		SWAPF	W_TEMP,F		;get saved wreg  
		SWAPF	W_TEMP,W

		RETFIE

;*******************************************************
; TABLES
;*******************************************************
SIN_TIMEL					; CCP1L data
		ADDWF	PCL,F
		RETLW	H'73'
		RETLW	H'77'
		RETLW	H'7F'
		RETLW	H'8C'
		RETLW	H'A8'
		RETLW	H'35'
		RETLW	H'AF'
		RETLW	H'34'
		RETLW	H'A8'
		RETLW	H'8C'
		RETLW	H'7F'
		RETLW	H'77'
		RETLW	H'73'
		RETLW	H'72'
		RETLW	H'73'
		RETLW	H'77'
		RETLW	H'7F'
		RETLW	H'8C'
		RETLW	H'A8'
		RETLW	H'35'
		RETLW	H'AF'
		RETLW	H'34'
		RETLW	H'A8'
		RETLW	H'8C'
		RETLW	H'7F'
		RETLW	H'77'
		RETLW	H'73'
		RETLW	H'72'
		RETLW	H'00'
SIN_TIMEH					; CCP1H data
		ADDWF	PCL,F
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'01'
		RETLW	H'01'
		RETLW	H'01'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'01'
		RETLW	H'01'
		RETLW	H'01'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
		RETLW	H'00'
SIN_SPAN					; Vr data
		ADDWF	PCL,F
		RETLW	H'C8'
		RETLW	H'C9'
		RETLW	H'CA'
		RETLW	H'CB'
		RETLW	H'CC'
		RETLW	H'CD'
		RETLW	H'CE'
		RETLW	H'CD'
		RETLW	H'CC'
		RETLW	H'CB'
		RETLW	H'CA'
		RETLW	H'C9'
		RETLW	H'C8'
		RETLW	H'C7'
		RETLW	H'C6'
		RETLW	H'C5'
		RETLW	H'C4'
		RETLW	H'C3'
		RETLW	H'C2'
		RETLW	H'C1'
		RETLW	H'C0'
		RETLW	H'C1'
		RETLW	H'C2'
		RETLW	H'C3'
		RETLW	H'C4'
		RETLW	H'C5'
		RETLW	H'C6'
		RETLW	H'C7'
		RETLW	H'00'
		END